This inventor holds 1 USPTO granted patent. Top assignee: Powertech Technology Inc.. Active years: 2019.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2019
Title: Innovations of Inventor Jen-Tung Tseng
Introduction
Jen-Tung Tseng is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor processing. His innovative approach has led to the development of a unique wafer processing method.
Latest Patents
Jen-Tung Tseng holds 1 patent for his invention titled "Wafer processing method with full edge trimming." This method utilizes a chuck table with a smaller diameter than the semiconductor wafer being processed. The technique implements edge trimming on the periphery of the wafer, resulting in a straight side and a flat portion that serves as a positioning means for taping and backside grind processes.
Career Highlights
Tseng is currently employed at Powertech Technology Inc., a leading company in the semiconductor industry. His work focuses on enhancing wafer processing techniques, which are crucial for the efficiency and effectiveness of semiconductor manufacturing.
Collaborations
Throughout his career, Jen-Tung Tseng has collaborated with esteemed colleagues, including Chui-Liang Chiu and Chin-Ta Wu. These partnerships have fostered innovation and advancement in their shared field.
Conclusion
Jen-Tung Tseng's contributions to semiconductor processing through his patented methods exemplify the importance of innovation in technology. His work continues to influence the industry and pave the way for future advancements.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile