Jeffrey P Bonn

Title: The Innovations of Jeffrey P Bonn

Introduction

Jeffrey P Bonn is a notable inventor based in Essex Junction, Vermont. He has made significant contributions to the field of integrated circuits, holding two patents that showcase his innovative spirit and technical expertise.

Latest Patents

One of Bonn's latest patents is titled "Integrated circuit and design structure having reduced through silicon via-induced stress." This invention provides an integrated circuit (IC) designed to minimize stresses induced by through silicon vias (TSVs). The method involves placing a plurality of TSV placeholder cells in an IC design file, with varying orientations to reduce substrate stress effectively. Another significant patent is the "Aspect ratio program for optimizing semiconductor chip shape." This invention utilizes a cost-based algorithm to determine semiconductor chip aspect ratios that minimize lithographic processing costs, optimizing chip matrices for various lithographic tools.

Career Highlights

Throughout his career, Jeffrey P Bonn has worked with prominent companies in the technology sector, including GlobalFoundries Inc. and International Business Machines Corporation (IBM). His experience in these organizations has allowed him to develop and refine his innovative ideas in semiconductor technology.

Collaborations

Bonn has collaborated with several talented individuals in his field, including Brent A Goplen and Brian L Kinsman. These collaborations have likely contributed to the success of his inventions and patents.

Conclusion

Jeffrey P Bonn's contributions to integrated circuit design and semiconductor technology highlight his role as an influential inventor. His patents reflect a commitment to innovation and problem-solving in the tech industry.