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For the Inventor, By the Inventor

Cedar Park, TX, United States of America

Jeffrey N Correll

This inventor holds 32 USPTO granted patents and 2 published patent applications and 2 EPO patents, primarily in Graphical Programming. Top assignee: National Instruments Corporation. Active years: 2007-2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jeffrey N Correll. Retrieved from https://idiyas.com/inventor/jeffrey-n-correll

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 32 

% Patents Active = 90.6

 

Average Co-Inventor Count = 4.1

ph-index = 14

Forward Citations = 536(Granted Patents)


Company Filing History:

goldMedal32 out of 1,118 
 
National Instruments Corporation
 patents

Years Active: 2007-2018

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Areas of Expertise:
Graphical Specification
Data Flow Optimization
Automated Compilation
Hardware Implementation
Timing Analysis
Configuration Diagram
Network-Based Systems
Semantic Zoom
Measurement Systems
Signal Routing
Performance Estimation
Debugging Simulations
32 patents (USPTO):Explore Patents
1. 9983852 - Graphical specification and constraint language for developing programs for hardware implementation and use (2018-05-29),
2. 9558099 - Staged program compilation with automated timing closure (2017-01-31),
3. 9436438 - Graphical specification and constraint language for developing programs for hardware implementation and use (2016-09-06),
4. 9335977 - Optimization of a data flow program based on access pattern information (2016-05-10),
5. 9310975 - Automatically determining data transfer functionality for wires in a graphical diagram (2016-04-12),
6. 9135143 - Automated analysis of compilation processes in a graphical specification and constraint language (2015-09-15),
7. 9047007 - Semantic zoom within a diagram of a system (2015-06-02),
8. 8887121 - Developing programs for hardware implementation in a graphical specification and constraint language (2014-11-11),
9. 8782525 - Displaying physical signal routing in a diagram of a system (2014-07-15),
10. 8726228 - Developing programs in a graphical specification and constraint language (2014-05-13),
11. 8719774 - Developing programs for hardware implementation in a graphical specification and constraint language Via iterative estimation of performance or resource utilization (2014-05-06),
12. 8612871 - Graphical diagram which automatically determines a data transport mechanism for wires based on configured policies (2013-12-17),
13. 8612870 - Graphically specifying and indicating targeted execution in a graphical program (2013-12-17),
14. 8555243 - Generating and debugging timing accurate simulations in a graphical specification and constraint language (2013-10-08),
15. 8307289 - Network based system which provides a database of simulation solutions (2012-11-06),

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Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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