logo

For the Inventor, By the Inventor

Aloha, OR, United States of America

Jeffrey M Abramson

This inventor holds 20 USPTO granted patents and 1 published patent application, primarily in Computer Architecture. Top assignees: Intel Corporation, Other. Active years: 1995-1999.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jeffrey M Abramson. Retrieved from https://idiyas.com/inventor/jeffrey-m-abramson

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 20 

% Patents Active = 100.0

Average Co-Inventor Count = 3.8

ph-index = 15

Forward Citations = 512(Granted Patents)


Company Filing History:

goldMedal19 out of 56,394 
 
Intel Corporation
 patents
silverMedal1 out of 834,601 
Other
 patents

Years Active: 1995-1999

Loading Chart...
Areas of Expertise:
Memory Addresses
Load Buffering
Processor Consistency
Dynamic Decoding Logic
Floating Point Transfers
Cache Memory
Instruction Fetching
Data Caching
High-Speed Circuits
Out-of-Order Processing
Segment Violations
Dispatch Readiness
20 patents (USPTO):Explore Patents
1. 5898854 - Apparatus for indicating an oldest non-retired load operation in an array (1999-04-27),
2. 5860154 - Method and apparatus for calculating effective memory addresses (1999-01-12),
3. 5784639 - Load buffer integrated dynamic decoding logic (1998-07-21),
4. 5781790 - Method and apparatus for performing floating point to integer transfers (1998-07-14),
5. 5778220 - Method and apparatus for disabling interrupts in a highly pipelined (1998-07-07),
6. 5751983 - Out-of-order processor with a memory subsystem which handles (1998-05-12),
7. 5748937 - Computer system that maintains processor ordering consistency by (1998-05-05),
8. 5721857 - Method and apparatus for saving the effective address of floating point (1998-02-24),
9. 5717882 - Method and apparatus for dispatching and executing a load operation to (1998-02-10),
10. 5708843 - Method and apparatus for handling code segment violations in a computer (1998-01-13),
11. 5694553 - Method and apparatus for determining the dispatch readiness of buffered (1997-12-02),
12. 5680572 - Cache memory system having data and tag arrays and multi-purpose buffer (1997-10-21),
13. 5671444 - Methods and apparatus for caching data in a non-blocking manner using a (1997-09-23),
14. 5664137 - Method and apparatus for executing and dispatching store operations in a (1997-09-02),
15. 5635862 - High-speed block id encoder circuit using dynamic logic (1997-06-03),

Title: Innovations of Jeffrey M Abramson: A Pioneer in Memory Operations

Introduction

Jeffrey M Abramson, based in Aloha, OR, has established himself as a significant contributor to the field of technology with 20 patents to his name. His work primarily revolves around memory operations and enhancing processing efficiency in computing systems.

Latest Patents

Among Abramson's latest patents is the invention titled "Apparatus for indicating an oldest non-retired load operation in an array." This invention presents a buffer management scheme that effectively allows load operations to be stored for execution to memory. The management scheme maintains pointers that identify entries in memory containing the oldest load operation and the next available location for new load operations. This coordination improves memory operations and integrates with the overall system operation, particularly within processors.

Another notable patent is the "Method and apparatus for calculating effective memory addresses." This macro instruction for microprocessors enables programmers to specify a base value, index, scale factor, and displacement value for calculating an effective address. By converting the macro instruction into a micro operation, this innovation allows for calculating an effective address in a single cycle, independent of the memory system execution units, thereby enhancing processing speed and efficiency.

Career Highlights

Jeffrey M Abramson has had a distinguished career, having worked for renowned technology companies, including Intel Corporation. His expertise and innovations have had a genuine impact on memory operation methodologies within various computing environments.

Collaborations

Throughout his career, Abramson has collaborated with several esteemed professionals in the field, notably Kris G Konigsfeld and Andrew F Glew. These collaborations have fostered a dynamic exchange of ideas, further propelling innovation in computer architecture and memory operations.

Conclusion

Jeffrey M Abramson continues to be a valuable figure in the realm of technology and memory processing. His contributions through inventive patents and collaborations illustrate his commitment to enhancing computational efficiency. As technology evolves, Abramson's innovations are likely to play a crucial role in shaping the future of memory operations in computing systems.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…