The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 1998

Filed:

Mar. 28, 1997
Applicant:
Inventors:

Jeffrey M Abramson, Aloha, OR (US);

Haitham Akkary, Portland, OR (US);

Andrew F Glew, Hillsboro, OR (US);

Glenn J Hinton, Portland, OR (US);

Kris G Konigsfeld, Portland, OR (US);

Paul D Madland, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395394 ; 395477 ;
Abstract

A computer system having a mechanism for maintaining processor ordering during out-of-order instruction execution is disclosed wherein load memory instructions are accessed according to program order and executed out-of-order in relation to the program order where appropriate. Processors in the system snoop an external bus for bus transactions that conflict with completed load memory instructions before committing results of the completed load memory instructions to an architectural state.


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Abramson, Jeffrey. (1998). Computer system that maintains processor ordering consistency by (U.S. Patent No. 5748937). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5748937

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