logo

For the Inventor, By the Inventor

Hillsboro, OR, United States of America

Jeffrey D Gilbert

This inventor holds 14 USPTO granted patents. Top assignee: Intel Corporation. Active years: 2006-2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jeffrey D Gilbert. Retrieved from https://idiyas.com/inventor/jeffrey-d-gilbert-n71brfd8

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 14

% Patents Active = 35.7

Average Co-Inventor Count = 3.3

ph-index = 5

Forward Citations = 39(Granted Patents)


Location History:

  • Portland, OR (US) (2006 - 2016)
  • Hillsboro, OR (US) (2010 - 2017)
  • Apache Junction, AZ (US) (2018)

Company Filing History:

goldMedal14 out of 56,290 
 
Intel Corporation
 patents

Years Active: 2006-2018

Loading Chart...
14 patents (USPTO):Explore Patents
1. 10078592 - Resolving multi-core shared cache access conflicts (2018-09-18),
2. 9727468 - Resolving multi-core shared cache access conflicts (2017-08-08),
3. 9501129 - Dynamically adjusting power of non-core processor circuitry including buffer circuitry (2016-11-22),
4. 8914650 - Dynamically adjusting power of non-core processor circuitry including buffer circuitry (2014-12-16),
5. 8407432 - Cache coherency sequencing implementation and adaptive LLC access priority control for CMP (2013-03-26),
6. 8015365 - Reducing back invalidation transactions from a snoop filter (2011-09-06),
7. 7779188 - System and method to reduce memory latency in microprocessor systems connected with a bus (2010-08-17),
8. 7689778 - Preventing system snoop and cross-snoop conflicts (2010-03-30),
9. 7647476 - Common analog interface for multiple processor cores (2010-01-12),
10. 7581068 - Exclusive ownership snoop filter (2009-08-25),
11. 7555597 - Direct cache access in multiple core processors (2009-06-30),
12. 7484044 - Method and apparatus for joint cache coherency states in multi-interface caches (2009-01-27),
13. 7228387 - Apparatus and method for an adaptive multiple line prefetcher (2007-06-05),
14. 7124229 - Method and apparatus for improved performance for priority agent requests when symmetric agent bus parking is enabled (2006-10-17),

Title: The Innovations of Jeffrey D. Gilbert

Introduction

Jeffrey D. Gilbert is a prominent inventor based in Hillsboro, OR (US). He has made significant contributions to the field of microprocessors and computer systems, holding a total of 14 patents. His work focuses on resolving complex issues related to shared cache access conflicts in multi-core processors.

Latest Patents

One of his latest patents is titled "Resolving multi-core shared cache access conflicts - Preventing request conflicts within microprocessors and/or computer systems." This invention relates to a technique designed to manage request conflicts within a processor or computer system. Specifically, it addresses scenarios where multiple accesses may occur to a particular cache or group of caches that are shared among a set of cores, processors, or agents.

Career Highlights

Jeffrey D. Gilbert has built a successful career at Intel Corporation, where he has been instrumental in advancing technology in the computing industry. His innovative approaches have led to improvements in processor efficiency and performance.

Collaborations

Throughout his career, Jeffrey has collaborated with notable colleagues, including Krishnakanth Venkata Sistla and Yen-Cheng Liu. These partnerships have fostered a collaborative environment that encourages innovation and the development of cutting-edge technologies.

Conclusion

Jeffrey D. Gilbert's contributions to the field of microprocessors and computer systems are noteworthy. His patents and collaborative efforts continue to influence advancements in technology, making him a significant figure in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…