Jeen-Yuan Miin

Title: Jeen-Yuan Miin: Innovator in Multi-Threaded Processor Technology

Introduction

Jeen-Yuan Miin is a notable inventor based in Palo Alto, CA, who has made significant contributions to the field of processor technology. With a total of 4 patents to his name, Miin has focused on enhancing the efficiency and performance of multi-threaded processors.

Latest Patents

Miin's latest patents include innovations such as "Multiple multi-threaded processors having an L1 instruction cache and a shared L2 instruction cache." This patent describes a processor that incorporates an instruction store to hold instructions for at least a portion of a program. The design features multiple engines connected to the shared instruction store, which provide multiple execution threads. Each engine includes an instruction cache that stores a subset of the program's instructions, with different portions of the cache allocated to various engine threads. Another significant patent is "Thread-based engine cache partitioning," which similarly outlines a processor architecture that optimizes instruction storage and execution across multiple threads.

Career Highlights

Jeen-Yuan Miin is currently employed at Intel Corporation, where he continues to push the boundaries of processor design and functionality. His work has been instrumental in advancing multi-threaded processing capabilities, which are crucial for modern computing applications.

Collaborations

Miin has collaborated with talented individuals such as Sridhar Lakshmanamurthy and Wilson Y Liao, contributing to a dynamic and innovative work environment.

Conclusion

Jeen-Yuan Miin's contributions to multi-threaded processor technology exemplify the impact of innovative thinking in the tech industry. His patents reflect a commitment to enhancing processor performance, which is vital for the future of computing.