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For the Inventor, By the Inventor

Austin, TX, United States of America

Jamshed Jalal

This inventor holds 75 USPTO granted patents and 15 published patent applications and 9 EPO patents, primarily in Data Processing Networks (CPC class G06F). Top assignee: Arm Limited. Active years: 2013-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jamshed Jalal. Retrieved from https://idiyas.com/inventor/jamshed-jalal

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 75 

% Patents Active = 100.0

 

Average Co-Inventor Count = 4.4

ph-index = 5

Forward Citations = 96(Granted Patents)

Forward Citations (Not Self Cited) = 64(Dec 10, 2025)


Inventors with similar research interests:


Company Filing History:

goldMedal75 out of 3,778 
 
Arm Limited
 patents

Years Active: 2013-2026

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Areas of Expertise:
Data Elision
Memory Access
Transaction Protocols
Cache Architecture
Chip-to-Chip Transfer
CCIX Management
Snoop Filter
Distributed Memory
Flow Compaction
Protocol Conversion
Coherency Control
Data Transfer
75 patents (USPTO):Explore Patents
1. 12730754 - Distributed virtual memory management (2026-09-08),
2. 12625813 - System level cache with configurable partitioning (2026-05-12),
3. 12487945 - Data elision (2025-12-02),
4. 12430032 - Apparatus and method for handling memory access requests (2025-09-30),
5. 12423237 - Data processing network with super home node (2025-09-23),
6. 12423030 - Transaction requests according to a request ordering protocol (2025-09-23),
7. 12242399 - Peripheral component handling of memory read requests (2025-03-04),
8. 12174753 - Methods and apparatus for transferring data within hierarchical cache circuitry (2024-12-24),
9. 12079132 - Method and apparatus for efficient chip-to-chip data transfer (2024-09-03),
10. 12001722 - Technique for controlling stashing of data (2024-06-04),
11. 11934334 - CCIX port management for PCI express traffic (2024-03-19),
12. 11899583 - Multi-dimensional cache architecture (2024-02-13),
13. 11841800 - Apparatus and method for handling stash requests (2023-12-12),
14. 11599467 - Cache for storing coherent and non-coherent data (2023-03-07),
15. 11593025 - Write operation status (2023-02-28),

Title: Innovations of Jamshed Jalal: Pioneering Advances in Data Processing Systems

Introduction: Jamshed Jalal, based in Austin, TX, has made significant contributions to technology through his impressive portfolio of 69 patents. His work primarily revolves around enhancing data processing systems and memory management, showcasing his expertise in the field of computer engineering.

Latest Patents: Among his latest innovations, Jalal has developed groundbreaking patents, including "Peripheral component handling of memory read requests" and "Methods and apparatus for transferring data within hierarchical cache circuitry." The former discloses systems comprising an interconnect that includes a cache and a peripheral component coupled to it, focusing on efficient memory access requests and prefetching techniques. The latter patent outlines a unique apparatus integrating first and second cache circuitry, addressing access latency and optimizing data retrieval processes.

Career Highlights: Jalal's extensive patent portfolio is a testament to his dedication and innovative spirit in the tech industry. His work at Arm Limited has positioned him as a key figure in developing advanced memory utilization methodologies that cater to the growing demands of processing systems.

Collaborations: Jamshed Jalal collaborates closely with talented individuals such as Phanindra Kumar Mannava and Tushar P Ringe. Their collective efforts have led to noteworthy advancements that push the boundaries of what's possible in data processing technologies.

Conclusion: Jamshed Jalal's contributions to the field of technology are rich with innovation and collaboration. His ongoing work continues to shape the future of data processing systems, and with each patent, he moves closer to redefining efficiency in memory management.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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