James Yu

Title: James Yu: Advancing Integrated Circuit Design Verification

Introduction

James Yu is an inventor based in Taipei, Taiwan. His patent work addresses the efficiency of design rule checking, an important step in verifying integrated circuit layouts.

Latest Patents

Yu is associated with one patent, titled “Dynamic Ordering of Design Rule Checks.” The method performs design rule checks on an initial portion of an integrated circuit design, collects execution data, and uses that data to reorder the design rule checkers. The updated sequence is then applied to another portion of the design. This approach uses observed checker performance to guide the order of subsequent checks.

Career Highlights

Yu is associated with Synopsys, Inc., a company that develops software and services for semiconductor design and verification. His patent reflects work on improving the process of checking integrated circuit designs.

Collaborations

Yu’s listed coworker is Sheng-Wei Yang. The available information identifies their professional association but does not specify details of their collaboration.

Conclusion

James Yu’s patent on dynamically ordering design rule checks highlights an approach to making integrated circuit verification more adaptive by using execution data to guide later checks.