Icheon, South Korea

Jae-Suk Lee

This inventor holds 11 USPTO granted patents. Top assignee: Dongbu Electronics, Co. Ltd.. Active years: 2006-2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jae-Suk Lee. Retrieved from https://idiyas.com/inventor/jae-suk-lee-lwsvky5z

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 54.5

Average Co-Inventor Count = 1.0

ph-index = 2

Forward Citations = 10(Granted Patents)


Location History:

  • Suwon, KR (2008)
  • Icheon-si, KR (2008)
  • Icheon, KR (2006 - 2009)

Company Filing History:


Years Active: 2006-2009

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11 patents (USPTO):Explore Patents

Title: Innovations by Jae-Suk Lee in Semiconductor Technology

Introduction

Jae-Suk Lee is a prominent inventor based in Icheon, South Korea. He has made significant contributions to the field of semiconductor technology, holding a total of 11 patents. His work focuses on improving the reliability and efficiency of semiconductor devices.

Latest Patents

Among his latest patents, Jae-Suk Lee has developed semiconductor devices and methods for manufacturing the same. One notable patent describes semiconductor devices that include a copper line layer and methods for their production. This invention features a damascene insulating layer with a contact hole, a barrier metal layer composed of a first ruthenium layer, a ruthenium oxide layer, and a second ruthenium layer. Additionally, a seed copper layer is formed on the barrier metal layer, culminating in a copper line layer made of a Cu–Ag–Au solid solution. This innovative method aims to reduce contact characteristic degradation of the barrier metal layer with the silicon substrate or the damascene insulating layer, thereby enhancing long-term device reliability.

Another patent focuses on semiconductor devices and methods of manufacturing them, where a dangling bond in the active regions is removed by introducing hydrogen in the PMD liner layer and the interlayer insulating layer. This process involves forming a gate electrode with a side wall spacer, creating source and drain regions, and sequentially forming a PMD liner layer. The method also includes diffusing hydrogen into the PMD liner layer and the interlayer insulating layer through annealing techniques.

Career Highlights

Jae-Suk Lee is currently associated with Dongbu Electronics Co., Ltd., where he continues to innovate in semiconductor technology. His expertise and inventions have significantly impacted the industry, leading to advancements in device performance and reliability.

Collaborations

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Conclusion

Jae-Suk Lee's contributions to semiconductor technology through his innovative patents demonstrate his commitment to enhancing device reliability and performance. His work continues to influence the field and pave the way for future advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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