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For the Inventor, By the Inventor

Yongin, South Korea

Jae Gon Lee

This inventor holds 25 USPTO granted patents and 2 published patent applications, primarily in Semiconductor Technology. Top assignees: Samsung Electronics Co., Ltd., University of California. Active years: 2014-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Jae Gon Lee. Retrieved from https://idiyas.com/inventor/jae-gon-lee-u4hml

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 25 

% Patents Active = 100.0

Average Co-Inventor Count = 3.7

ph-index = 4

Forward Citations = 54(Granted Patents)


Location History:

  • Suwon-si, KR (2015)
  • Yongin-si, KR (2014 - 2023)
  • Seongnam-si, KR (2019 - 2024)

Company Filing History:

goldMedal25 out of 132,108 
 
Samsung Electronics Co., Ltd.
 patents
silverMedal1 out of 16,048 
 
University of California
 patents
where one patent can have more than one assignee

Years Active: 2014-2025

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Areas of Expertise:
Dynamic Voltage Frequency Scaling
Clock Management
Power Management
Semiconductor Device
System On Chip
Asynchronous Bridge
Clock Generation Circuit
Data-Retained Power-Gating Circuit
Hierarchical Power Management
Clock Control Circuit
Semiconductor System
Oscillating Clock Signal
25 patents (USPTO):Explore Patents
1. 12379768 - Electronic device and method of controlling temperature associated with a semiconductor device using dynamic voltage frequency scaling (DVFS) (2025-08-05),
2. 12130657 - Semiconductor device (2024-10-29),
3. 11860687 - Semiconductor device (2024-01-02),
4. 11789515 - Semiconductor device (2023-10-17),
5. 11747853 - Semiconductor device, semiconductor system and method for operating semiconductor device (2023-09-05),
6. 11592861 - Semiconductor device (2023-02-28),
7. 11340685 - Semiconductor device including clock management unit for outputting clock and acknowledgment signals to an intelectual property block (2022-05-24),
8. 11314278 - Semiconductor device, semiconductor system and method for operating semiconductor device (2022-04-26),
9. 10969854 - Semiconductor device including clock management unit for outputing clock and acknowledgement signals to an intellectual property block (2021-04-06),
10. 10928849 - Semiconductor device, semiconductor system and method for operating semiconductor device (2021-02-23),
11. 10503674 - Semiconductor device including a clock source for generating a clock signal and a clock control circuit for controlling the clock source in hardware, a semiconductor system including the semiconductor device, and a method of operating the semiconductor device (2019-12-10),
12. 10432183 - Clock generation circuit having deskew function and semiconductor integrated circuit device including same (2019-10-01),
13. 10429881 - Semiconductor device for stopping an oscillating clock signal from being provided to an IP block, a semiconductor system having the semiconductor device, and a method of operating the semiconductor device (2019-10-01),
14. 10303203 - Semiconductor device, semiconductor system and method for operating semiconductor device (2019-05-28),
15. 10296066 - Semiconductor device, semiconductor system, and method of operating the semiconductor device (2019-05-21),

Title: Exploring the Innovations of Jae Gon Lee

Introduction: Jae Gon Lee, an accomplished inventor located in Yongin-si, South Korea, holds an impressive portfolio of 24 patents. His work primarily focuses on semiconductor technology, contributing significantly to advancements in this essential field.

Latest Patents: One of his latest innovations is a semiconductor device designed to enhance the efficiency of clock management. This device includes an intellectual property (IP) block, a clock management unit, a critical path monitor (CPM), and a CPM clock manager integrated within the clock management unit. The clock management unit is engineered to receive a clock request signal from the IP block, indicating whether a clock signal is necessary. Based on this signal, it performs clock gating to optimize performance. The CPM is tasked with monitoring the clock signal supplied to the IP block, adjusting both the frequency and voltage to maintain optimal operation. This innovative approach aims to improve the overall efficiency and functionality of semiconductor devices.

Career Highlights: Jae Gon Lee's career is marked by significant contributions while working at prestigious organizations, including Samsung Electronics Co., Ltd. and the University of California, San Diego. His experience in these leading-edge environments has allowed him to pioneer advancements in semiconductor technology and clock management systems.

Collaborations: Throughout his professional journey, Jae Gon Lee has had the opportunity to collaborate with talented individuals such as Ah Chan Kim and Jae Young Lee. These collaborations have fostered an environment of innovation and mutual growth, enhancing the impact of their collective research and developments.

Conclusion: Jae Gon Lee stands out as a prominent figure in the realm of semiconductor innovations. His extensive patent portfolio reflects his dedication to improving technology and efficiency in the industry. As he continues to work on groundbreaking projects, the contributions of inventors like him will undoubtedly shape the future of technological advancements.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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