Company Filing History:
Years Active: 2015
Title: Jacob Zelnik - Innovator in Integrated Circuit Layout Checking
Introduction
Jacob Zelnik is a notable inventor based in Sunnyvale, CA (US). He has made significant contributions to the field of integrated circuit design through his innovative patent. His work focuses on enhancing the efficiency and accuracy of checking integrated circuit layouts.
Latest Patents
Jacob holds a patent for a method, system, and computer program product for checking an integrated circuit layout for instances of a reference pattern. The patent outlines a comprehensive process that includes receiving the integrated circuit layout and a drawing of the reference pattern from a user. It further details steps for deducting a basic pattern definition, determining topological relations, and forming a complex pattern description. The method culminates in checking the integrated circuit layout for matching patterns and storing the found instances of the reference pattern.
Career Highlights
Jacob is currently employed at Sage Design Automation Ltd. His role involves applying his expertise in integrated circuit design and layout checking. His innovative approach has positioned him as a valuable asset in the field.
Collaborations
Jacob has collaborated with notable colleagues, including Jozefus Godefridus Gerardus Pancratius Van Gisbergen and Daniel James Blakely. These collaborations have further enriched his work and contributed to advancements in integrated circuit technology.
Conclusion
Jacob Zelnik's contributions to the field of integrated circuit layout checking demonstrate his innovative spirit and technical expertise. His patent reflects a significant advancement in the efficiency of circuit design processes.