Jack Z Yinger

Title: Jack Z Yinger: Innovator in Systolic Array Architectures

Introduction

Jack Z Yinger is a notable inventor based in San Jose, California. He has made significant contributions to the field of integrated circuits, particularly in the area of matrix multiplication. His innovative approach has led to advancements that enhance the efficiency of processing elements in systolic array architectures.

Latest Patents

Jack Z Yinger holds a patent for a "Memory-size- and bandwidth-efficient method for feeding systolic array matrix multipliers." This patent focuses on matrix multiplication systolic array feed methods and related processing element microarchitectures. The invention aims to efficiently implement the systolic array generic matrix multiplier (SGEMM) in integrated circuits. The architecture includes a processing element array, a column feeder array, and a row feeder array. By interleaving matrix data through a specific feeding pattern, the bandwidth of external memory can be significantly reduced.

Career Highlights

Jack Z Yinger is currently employed at Intel Corporation, where he continues to work on innovative technologies. His expertise in integrated circuits and matrix multiplication has positioned him as a valuable asset to the company. His work contributes to the ongoing advancements in computing technology.

Collaborations

Jack has collaborated with notable colleagues, including Andrew Ling and Tomasz Czajkowski. Their combined efforts in research and development have furthered the understanding and implementation of systolic array architectures.

Conclusion

Jack Z Yinger's contributions to the field of integrated circuits and matrix multiplication are noteworthy. His innovative patent and work at Intel Corporation highlight his role as a leading inventor in this domain. His advancements continue to influence the efficiency of computing technologies.