J S Shiao

Title: J S Shiao: Innovator in DRAM Technology

Introduction

J S Shiao is a prominent inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in dynamic random-access memory (DRAM) systems. With a total of 5 patents to his name, Shiao's work has had a lasting impact on the industry.

Latest Patents

One of Shiao's latest patents is an etching method for reducing bit line coupling in a DRAM. This innovative method involves forming an interlayer dielectric over the DRAM memory array, etching the dielectric to create trenches that form a bit line pattern, and depositing a conductive material into these trenches to establish the bit line. Another notable patent is for a two-step cap nitride deposition process for forming gate electrodes in integrated circuits. This method enhances the condition of silicon nitride residue on tungsten silicide surfaces by sequentially depositing layers of polysilicon and tungsten silicide, followed by a carefully controlled deposition of silicon nitride at two different temperatures.

Career Highlights

Throughout his career, J S Shiao has worked with various companies, including Promos Technologies, Inc. His expertise in semiconductor technology has positioned him as a key player in the development of advanced memory solutions.

Collaborations

Shiao has collaborated with notable colleagues such as Joseph Wu and Wei-kun Yeh. Their combined efforts have contributed to the advancement of innovative technologies in the semiconductor field.

Conclusion

J S Shiao's contributions to DRAM technology and semiconductor innovation are noteworthy. His patents reflect a commitment to enhancing memory systems, and his collaborations with industry professionals further underscore his impact on the field.