Itaru Kanno

Title: Itaru Kanno: Innovator in Semiconductor Technology

Introduction

Itaru Kanno is a prominent inventor based in Takarazuka, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 3 patents. His work focuses on improving the manufacturing processes and performance of semiconductor devices.

Latest Patents

Kanno's latest patents include innovative designs and methods for semiconductor devices. One of his notable inventions is a semiconductor device featuring copper (Cu) wiring that incorporates a basic crystal structure aimed at reducing surface voids. This technology allows for a reduction of surface voids to 1/10 or less of the current practical level. This is achieved by specifying a barrier layer and a seed layer, while also setting a proportion of occupation of a coincidence site lattice (CSL) boundary with a grain boundary Sigma value of 27 or less to 60% or higher. Alternatively, a similar effect can be obtained by adjusting the CSL boundary with a Sigma value of 3 to 40% or higher.

Career Highlights

Itaru Kanno is currently employed at Renesas Electronics Corporation, where he continues to advance semiconductor technology. His expertise in the field has led to significant advancements in manufacturing methods and inspecting apparatuses for semiconductor devices.

Collaborations

Kanno has collaborated with notable colleagues such as Takahiko Kato and Hiroshi Nakano. Their combined efforts have contributed to the development of innovative solutions in semiconductor technology.

Conclusion

Itaru Kanno's work in semiconductor technology exemplifies the impact of innovation in the industry. His patents and collaborations highlight his commitment to advancing the field and improving manufacturing processes.