Andreevka, Russia

Iouri G Smirnov

This inventor holds 2 USPTO granted patents. Top assignee: Freescale Semiconductor,inc.. Active years: 2010-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Iouri G Smirnov. Retrieved from https://idiyas.com/inventor/iouri-g-smirnov

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 50.0

Average Co-Inventor Count = 4.8

ph-index = 2

Forward Citations = 14(Granted Patents)


Company Filing History:


Years Active: 2010-2014

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2 patents (USPTO):Explore Patents

Title: Iouri G Smirnov: Innovator in Circuit Design

Introduction

Iouri G Smirnov is a notable inventor based in Andreevka, Russia. He has made significant contributions to the field of circuit design, holding 2 patents that showcase his innovative approach to technology.

Latest Patents

One of his latest patents is titled "Transistor-level layout synthesis." This patent describes a layout tool that partially replicates the layout of a base cell to determine the layout for a target cell. The base cell represents an arrangement of a set of transistors with an established layout, while the target cell indicates the desired arrangement of another set of transistors. The layout tool identifies correspondences between subsets of the base cell transistors and subsets of the target cell transistors, replicating the layout of the identified base cell subsets to determine the layout for the identified target cell subsets. Additionally, the tool can identify base cell subsets that closely match target cell subsets but cannot be exactly replicated due to obstructions. For these identified subsets, the layout tool can adjust the base cell subset layouts to avoid the obstructions.

Another significant patent is the "System and method for electromigration tolerant cell synthesis." This invention provides a method, data processing system, and computer program product for routing a circuit placement multiple times, resulting in various routings. An electromigration quality value is computed for each routing, and the routing with the best electromigration quality value is selected. In one embodiment, each routing is analyzed concerning the current passing through each segment to compute a current distribution used to determine a routing quality vector. In another embodiment, multiple placements are generated, and the electromigration placement quality vectors are computed for the various placements, selecting the one with the best electromigration quality vector.

Career Highlights

Iouri G Smirnov is currently employed at Freescale Semiconductor, Inc., where he continues to innovate in the field of semiconductor technology. His work has had a significant impact on the design and efficiency of electronic circuits.

Collaborations

Throughout his career, Iouri has collaborated with notable professionals, including Robert L Maziasz and Vladimir Pavlovich Rozenfeld. These collaborations have contributed to the advancement of technology in their respective fields.

Conclusion

Iouri G Smirnov is a distinguished inventor whose work in circuit design has led to valuable patents that

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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