Kyungki-do, South Korea

Ii Keoun Han

This inventor holds 2 USPTO granted patents. Top assignee: Hynix Semiconductor Inc.. Active years: 2004-2006.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ii Keoun Han. Retrieved from https://idiyas.com/inventor/ii-keoun-han

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1

Forward Citations = 1(Granted Patents)


Location History:

  • Icheon-si, KR (2004)
  • Kyungki-Do, KR (2006)

Company Filing History:


Years Active: 2004-2006

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2 patents (USPTO):Explore Patents

Title: Innovations of Ii Keoun Han in Semiconductor Technology

Introduction

Ii Keoun Han is a notable inventor based in Kyungki-do, South Korea. He has made significant contributions to the field of semiconductor technology, holding 2 patents that showcase his innovative approaches to device fabrication.

Latest Patents

One of his latest patents is titled "Method of forming isolation film in semiconductor device." This invention relates to a method for forming an isolation film in a semiconductor device. After a trench for isolation is formed, a polymer film is stripped by a post-cleaning process using BFN. A pre-treatment cleaning process using only SC-1 is performed, followed by a sidewall oxidization process. This method improves the roughness of the trench sidewall and facilitates the easy stripping of polymer. Additionally, by omitting a conventional PET process, the isolation film manufacturing process is simplified. The invention also prevents out-diffusion of dopants injected into a semiconductor substrate through a pre-treatment cleaning process using CLN N before the sidewall oxidization process. By forming a slope at the top corner of the trench, it prevents the gate oxide film thinning phenomenon, ensuring that the active region meets the target critical dimension.

Another significant patent by Han is the "Method of forming gate electrode in flash memory device." This method includes the steps of sequentially forming a tunnel oxide film and an undoped first polysilicon film on a semiconductor substrate. It also involves forming a doped second polysilicon film with a specific doping concentration on the first polysilicon film, followed by the formation of a dielectric film and a third polysilicon film. The results are patterned to create a floating gate electrode pattern and a control gate electrode pattern. The oxidization process forms a sidewall oxide film in both patterns. This method allows for uniform control of the sidewall oxide film thickness, securing the critical dimension of the gate electrode.

Career Highlights

Ii Keoun Han is currently employed at Hynix Semiconductor Inc., where he continues to innovate in semiconductor technologies. His work has significantly impacted the efficiency and effectiveness of semiconductor device fabrication.

Collaborations

Han collaborates with various professionals in the field, including his coworker Cha Deok Dong, to further enhance the development of semiconductor technologies.

Conclusion

Ii Keoun Han's contributions to semiconductor technology through his innovative patents demonstrate

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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