Singapore, Singapore

Igor V Peidous

This inventor holds 17 USPTO granted patents, primarily in Silicon Fabrication. Top assignee: Chartered Semiconductor Manufacturing Ltd (Corporation). Active years: 1998-2002.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Igor V Peidous. Retrieved from https://idiyas.com/inventor/igor-v-peidous-jtmymyej

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 1.4

ph-index = 7

Forward Citations = 414(Granted Patents)


Company Filing History:


Years Active: 1998-2002

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Areas of Expertise:
Silicon Oxidation
MOSFET Manufacturing
Shallow Trench Isolation
Self-Aligning Ion Implanting
LOCOS Mask
Parasitic Reduction
Narrow Space Field Oxide
Device Structures
17 patents (USPTO):Explore Patents

Title: Innovations of Igor V Peidous

Introduction

Igor V Peidous is a prominent inventor based in Singapore, known for his significant contributions to semiconductor technology. With a total of 17 patents to his name, he has made remarkable advancements in the field of integrated circuits and device structures.

Latest Patents

One of his latest patents is titled "Dislocation free local oxidation of silicon with suppression of narrow space field oxide thinning effect." This innovative design of an oxidation mask improves control of the birds beak and tailors the field oxide isolation profile in sub half-micron integrated circuit technology. The mask utilizes a thin silicon nitride foot to allow nominal expansion of the oxide during early oxidation stages, facilitating in-situ stress relief and smoothing of the oxide profile. Additionally, a cantilevered portion of a thicker silicon nitride layer suppresses upward movement during later oxidation stages, significantly reducing shear stresses responsible for dislocation generation.

Another notable patent is the "Method and mask structure for self-aligning ion implanting to form various device structures." This method enables the creation of self-aligned sub-micrometer bipolar transistors and FETs on a substrate for BiFET and BiCMOS circuits. The novel LOCOS structure serves as a self-aligned implant mask, allowing for efficient formation of the emitter, base, and collector of bipolar transistors without the need for separate photoresist masks. This method minimizes the thermal budget and enhances the performance of the devices.

Career Highlights

Igor V Peidous has made significant strides in his career while working at Chartered Semiconductor Manufacturing Ltd. His innovative approaches have led to advancements in semiconductor manufacturing processes and device performance.

Collaborations

Throughout his career, Igor has collaborated with notable colleagues, including Konstantin V Loiko and Vladislav Y Vassiliev. Their combined expertise has contributed to the success of various projects and innovations in the semiconductor field.

Conclusion

Igor V Peidous is a distinguished inventor whose work has greatly impacted semiconductor technology. His innovative patents and contributions continue to shape the future of integrated circuits and device structures.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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