Kaohsiung, Taiwan

Hsueh-Heng Liu

This inventor holds 2 USPTO granted patents. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2002-2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hsueh-Heng Liu. Retrieved from https://idiyas.com/inventor/hsueh-heng-liu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 1.3

ph-index = 2

Forward Citations = 12(Granted Patents)


Company Filing History:


Years Active: 2002-2004

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2 patents (USPTO):Explore Patents

Title: Hsueh-Heng Liu: Innovator in Semiconductor Technology

Introduction

Hsueh-Heng Liu is a prominent inventor based in Kaohsiung, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in the development of methods that enhance the performance and reliability of electronic devices. With a total of 2 patents to his name, Liu continues to push the boundaries of innovation in his field.

Latest Patents

Liu's latest patents include a method to prevent antifuse Si damage using sidewall spacers. This innovative approach involves forming an antifuse interconnect structure for a one-time fusible link with field-programmable gate arrays. The process utilizes an amorphous silicon layer as the antifuse layer, which is protected by critical silicon nitride sidewall spacers during the patterning and etching of the overlying metal layer. This protective measure ensures that the amorphous silicon antifuse remains intact during subsequent processes.

Another notable patent is the method for improving the electrical isolation between the contact and gate in a self-aligned contact MOSFET device structure. This method enhances the fabrication of a polycide self-aligned contact for MOSFET devices, improving the electrical isolation between the source/drain contact and gate structure. The process involves the deposition of a gate insulator layer, a polysilicon layer, a metal silicide layer, and an insulating layer on a semiconductor substrate. The insulating layer is then patterned and etched to expose the underlying metal silicide layer, leading to improved device performance.

Career Highlights

Hsueh-Heng Liu is currently employed at Taiwan Semiconductor Manufacturing Company Limited, where he applies his expertise in semiconductor fabrication and innovation. His work has been instrumental in advancing the technology used in modern electronic devices.

Collaborations

Liu collaborates with various professionals in the field, including his coworker Yun-Hung Shen, who is also a talented innovator in semiconductor technology.

Conclusion

Hsueh-Heng Liu's contributions to semiconductor technology through his innovative patents demonstrate his commitment to advancing the field. His work not only enhances device performance but also paves the way for future innovations in electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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