Albany, CA, United States of America

Hsing-Jen Wann

This inventor holds 7 USPTO granted patents. Top assignee: University of California. Active years: 1995-2001.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hsing-Jen Wann. Retrieved from https://idiyas.com/inventor/hsing-jen-wann

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.8

ph-index = 7

Forward Citations = 1,032(Granted Patents)


Company Filing History:


Years Active: 1995-2001

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7 patents (USPTO):Explore Patents

Title: **Innovative Contributions of Hsing-Jen Wann in Silicon-on-Insulator Technology**

Introduction:

Hsing-Jen Wann is a renowned inventor based in Albany, CA, with a significant portfolio comprising seven patents. His work primarily focuses on advancements in silicon-on-insulator (SOI) technology, resulting in improved electrical characteristics and enhanced protection against electrostatic discharge (ESD).

Latest Patents:

Hsing-Jen Wann's groundbreaking patents demonstrate his innovative approach in semiconductor technology. His latest patents include designs for silicon-on-insulator transistors that exhibit improved current characteristics. One notable invention features an SOI MOSFET that incorporates a low barrier body contact under the source and drain regions. This design facilitates the efficient collection and removal of current carriers generated by impact ionization. Furthermore, this technology enables the integration of fully-depleted and non-fully-depleted SOI MOSFETs on the same chip. By utilizing thicker source and drain regions with a recessed channel and selective channel dopant implant, both digital and analog circuitry can coexist on a single substrate. His advancements also extend to enhanced ESD protection mechanisms, which can be either integrated directly in the supporting substrate or formed in the silicon film through electrically isolated segments.

Career Highlights:

Hsing-Jen Wann has made substantial contributions to silicon-on-insulator technology during his tenure at the University of California. His innovative work has positioned him as a prominent figure in the field, leading to several patents that showcase his technical expertise and commitment to advancing semiconductor technology.

Collaborations:

Throughout his career, Hsing-Jen Wann has collaborated with esteemed colleagues such as Chenming Hu and Mansun John Chan. These partnerships have fostered an environment of innovation and research excellence, contributing to advancements in silicon-on-insulator technology.

Conclusion:

Hsing-Jen Wann's innovative spirit and dedication to research have significantly influenced the development of silicon-on-insulator transistors. With his impressive portfolio of patents and ongoing collaboration with leading experts, he continues to be a driving force in enhancing semiconductor technology for the future.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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