Capacitorless dram device on silicon-on-insulator substrate

Abstract

A DRAM device has a first semiconductor region of one conductivity on the silicon film of a silicon-on-insulator substrate. A second and a third semiconductor region of the opposite conductivity type are formed in the first semiconductor region. A fourth semiconductor region of the same conductivity type as the first semiconductor region is formed within the second semiconductor region with higher doping concentration. An insulating layer is formed on the semiconductor surface. On top of the insulating layer, a gate electrode is formed and is at least partially overlapped with the first, the second, the third, and the fourth semiconductor region. A storage node is formed in the first semiconductor region between the second and the third semiconductor region where the information is stored. The amount of charge stored in the storage node is controlled by a first transistor including the fourth semiconductor region, the second semiconductor region, the storage node, and the gate electrode. The charge stored in the storage node will affect the characteristics of a second transistor including the third semiconductor region, the storage node, the second semiconductor region, and the gate electrode, thereby the information stored in the storage node is detected.