Cupertino, CA, United States of America

Hongliang Chang

This inventor holds 5 USPTO granted patents. Top assignee: Cadence Design Systems, Inc.. Active years: 2011-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hongliang Chang. Retrieved from https://idiyas.com/inventor/hongliang-chang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 60.0

Average Co-Inventor Count = 4.2

ph-index = 4

Forward Citations = 244(Granted Patents)


Location History:

  • San Jose, CA (US) (2011)
  • Cupertino, CA (US) (2011 - 2014)

Company Filing History:


Years Active: 2011-2014

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5 patents (USPTO):Explore Patents

Title: Innovations of Hongliang Chang in Circuit Design

Introduction

Hongliang Chang is a prominent inventor based in Cupertino, CA, known for his significant contributions to the field of circuit design. With a total of five patents to his name, he has made notable advancements in static timing analysis and on-chip variation de-rating factors. His work is instrumental in enhancing the accuracy and efficiency of integrated circuit designs.

Latest Patents

Hongliang Chang's latest patents focus on static timing analysis with design-specific on-chip variation de-rating factors. In one embodiment, he discloses a method for analyzing circuit designs concerning within-die process variation. This method generates a design-specific on-chip variation (DS-OCV) de-rating factor by executing a static timing analysis (STA) in an on-chip variation mode using a process corner library. The process involves collecting timing information of the top N critical timing paths and executing a statistical static timing analysis (SSTA) on these paths. By comparing the timing results, he derives DS-OCV de-rating factors for clock and data paths, which are essential for accurate timing analysis in the presence of process variations. Users can specify DS-OCV de-rating factors for specific paths or groups, resulting in a more precise timing analysis report with reduced run-time.

Career Highlights

Hongliang Chang is currently employed at Cadence Design Systems, Inc., where he continues to innovate in the field of electronic design automation. His expertise in static timing analysis has positioned him as a key player in developing tools that enhance the design process for integrated circuits.

Collaborations

Throughout his career, Hongliang has collaborated with notable professionals in the industry, including Vassilios Constantinos Gerousis and Sachin Shrivastava. These collaborations have further enriched his work and contributed to the advancements in circuit design methodologies.

Conclusion

Hongliang Chang's contributions to circuit design through his innovative patents and collaborations highlight his significant role in the field. His work continues to influence the development of more efficient and accurate electronic design tools.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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