The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 03, 2012
Filed:
Apr. 10, 2007
Hongliang Chang, Cupertino, CA (US);
Oleg Levitsky, San Jose, CA (US);
Nikolay Rubanov, San Jose, CA (US);
Vassilios Gerousis, San Jose, CA (US);
Hongliang Chang, Cupertino, CA (US);
Oleg Levitsky, San Jose, CA (US);
Nikolay Rubanov, San Jose, CA (US);
Vassilios Gerousis, San Jose, CA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
A system and method for determining the criticality of each timing pin in a circuit design are disclosed. The criticality of a timing pin is the probability that the timing pin is on the path with the worst slack in the circuit design. According to the methodology, the slack for each timing pin is calculated, wherein each slack is a function of a process random variable. Then, the criticality of each timing pin is determined as the probability of the timing pin having the minimum slack among the slacks in an independent critical set of timing pins. The criticality of each timing pin may then be normalized. By determining the criticalities of the timing pins in a circuit design, a circuit design system may be able to more easily identify portions of the circuit design that need modification for timing and other purposes.