Mitaka, Japan

Hisashi Terashita

This inventor holds 4 USPTO granted patents. Top assignee: Tokyo Seimitsu Co., Ltd.. Active years: 1999-2001.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hisashi Terashita. Retrieved from https://idiyas.com/inventor/hisashi-terashita

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 4.1

ph-index = 3

Forward Citations = 62(Granted Patents)


Company Filing History:


Years Active: 1999-2001

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4 patents (USPTO):Explore Patents

Title: Hisashi Terashita: Innovator in Semiconductor Polishing Technology

Introduction

Hisashi Terashita is a prominent inventor based in Mitaka, Japan. He has made significant contributions to the field of semiconductor technology, particularly in the area of wafer polishing. With a total of 4 patents to his name, Terashita's innovations have advanced the efficiency and effectiveness of semiconductor manufacturing processes.

Latest Patents

Among his latest patents, Terashita has developed a polishing apparatus designed to enhance the uniformity of semiconductor wafer polishing. This apparatus features a turntable that polishes the wafer while a holding and pressing part applies pressure through a pressurized fluid layer. This innovative design ensures that the semiconductor wafer is polished uniformly, improving the overall quality of the final product.

Another notable invention is the wafer polishing apparatus, which includes a first air guide groove that supplies air to the wafer's outer periphery. This creates a pressure air layer that allows for uniform pressure application across the wafer's surface. Additionally, a second air guide groove accommodates wafers with orientation flats or notches, ensuring consistent polishing results.

Career Highlights

Terashita is currently employed at Tokyo Seimitsu Co., Ltd., a company known for its advanced semiconductor manufacturing equipment. His work at this organization has allowed him to focus on developing innovative solutions that address the challenges faced in the semiconductor industry.

Collaborations

Throughout his career, Terashita has collaborated with notable colleagues, including Minoru Numoto and Takao Inaba. These partnerships have fostered a creative environment that has led to the development of groundbreaking technologies in wafer polishing.

Conclusion

Hisashi Terashita's contributions to semiconductor polishing technology have made a lasting impact on the industry. His innovative patents and collaborative efforts continue to drive advancements in semiconductor manufacturing processes.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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