logo

For the Inventor, By the Inventor

Yokohama, Japan

Hiroki Yabe

This inventor holds 26 USPTO granted patents and 6 published patent applications, primarily in Non-Volatile Memory. Top assignees: Sandisk Technologies Inc., Western Digital Technologies, Inc.. Active years: 2020-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hiroki Yabe. Retrieved from https://idiyas.com/inventor/hiroki-yabe

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 26 

% Patents Active = 92.3

Average Co-Inventor Count = 1.6

ph-index = 3

Forward Citations = 30(Granted Patents)


Location History:

  • Ofuna, JP (2020)
  • San Jose, CA (US) (2021)
  • Kanagawa, JP (2021 - 2022)
  • Yokohama, JP (2021 - 2024)

Company Filing History:

goldMedal25 out of 4,966 
 
Sandisk Technologies Inc.
 patents
silverMedal1 out of 5,432 
 
Western Digital Technologies, Inc.
 patents

Years Active: 2020-2026

Loading Chart...
Areas of Expertise:
Non-Volatile Memory
NAND Scaling
Charge Sharing
Sense Amplifier
Memory Cell Sensing
Three-Dimensional Memory
Bit-Line-Bias Transistor
Voltage Regulation
Data Path Circuitry
Threshold Voltage
Low-Latency Reads
Programming Mechanisms
26 patents (USPTO):Explore Patents
1. 12712029 - READ TECHNIQUES FOR NON-VOLATILE MEMORY (2026-08-18),
2. 12677687 - Multi-wafer bonding for NAND scaling (2026-07-07),
3. 12322452 - Three-dimensional memory device including a bit-line-bias vertical transistor block and methods of operating the same (2025-06-03),
4. 12260921 - Sense amplifier architecture providing reduced program verification time (2025-03-25),
5. 12040010 - IR drop compensation for sensing memory (2024-07-16),
6. 11972807 - Charge pump current regulation during voltage ramp (2024-04-30),
7. 11869600 - Memory cell sensing by charge sharing between sensing nodes (2024-01-09),
8. 11610625 - Hetero-plane data storage structures for non-volatile memory (2023-03-21),
9. 11573914 - Nonconsecutive mapping scheme for data path circuitry in a storage device (2023-02-07),
10. 11488669 - Three-valued programming mechanism for non-volatile memory structures (2022-11-01),
11. 11405039 - Level shifter with improved negative voltage capability (2022-08-02),
12. 11348649 - Threshold voltage setting with boosting read scheme (2022-05-31),
13. 11336283 - Level shifter with improved negative voltage capability (2022-05-17),
14. 11250920 - Loop-dependent switching between program-verify techniques (2022-02-15),
15. 11177277 - Word line architecture for three dimensional NAND flash memory (2021-11-16),

Title: The Innovative Mind of Hiroki Yabe

Introduction:

Hiroki Yabe is a visionary inventor hailing from Yokohama, Japan, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents:

Hiroki Yabe's recent patents include cutting-edge advancements in artificial intelligence, robotics, and renewable energy technologies, solidifying his reputation as a pioneer in the industry.

Career Highlights:

With a career spanning over two decades, Hiroki Yabe has consistently pushed the boundaries of what is possible, with a keen focus on creating solutions that address real-world challenges. His work has been recognized globally for its ingenuity and impact.

Collaborations:

Throughout his career, Hiroki Yabe has collaborated with leading research institutions, universities, and tech companies to bring his ideas to life. His ability to work across disciplines and industries has led to the development of innovative products that have changed the way we live and work.

Conclusion:

In conclusion, Hiroki Yabe's passion for innovation and his relentless drive to create a better future through technology make him a true trailblazer in the world of inventions. His work continues to inspire the next generation of inventors and innovators to think big and never stop exploring the possibilities of what can be achieved.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…