Hirohito Higashi

This inventor holds 5 USPTO granted patents and 2 published patent applications. Top assignees: Fujitsu Corporation, Fujitsu Semiconductor Limited. Active years: 2003-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hirohito Higashi. Retrieved from https://idiyas.com/inventor/hirohito-higashi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

USPTO Granted Patents = 5 (Patent Applications = 2)

% Patents Active = 60.0

Average Co-Inventor Count = 1.3

ph-index = 3

Forward Citations = 21(Granted Patents)

Location History:

Kawasaki, JP (2003 - 2011)
Yokohama, JP (2012)

Company Filing History:

Fujitsu Semiconductor Limited

patents

Years Active: 2003-2012

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5 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8264259 - Phase-locked loop circuit and delay-locked loop circuit (2012-09-11),

2. 8085071 - Phase-locked loop circuit and delay-locked loop circuit (2011-12-27),

3. 8044727 - Phased locked loop circuit including voltage controlled ring oscillator (2011-10-25),

4. 7336135 - Oscillator and semiconductor device (2008-02-26),

5. 6624706 - Automatic bias adjustment circuit for use in PLL circuit (2003-09-23),

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

2 patents pending: