Fujitsu Corporation

Fujitsu Semiconductor Limited

Hirohito Higashi

Hideki Ishida

A phase-locked loop circuit includes a phase comparator that compares phases between a reference signal and a feedback signal and outputs a phase difference signal indicating a phase difference therebetween; a charge pump that outputs a charge pump current according to the phase difference signal; a low-pass filter that includes a resistor and a capacitor and that smoothes the charge pump current and converts the smoothed current into a control voltage; a voltage-controlled oscillator that generates an oscillation signal with a frequency according to the control voltage; and a frequency divider that generates a frequency-divided signal by frequency-dividing the oscillation signal and outputs the frequency-divided signal to the phase comparator as the feedback signal, wherein the resistor in the low-pass filter is a variable resistor that is changed according to the control voltage.

Phase-locked loop circuit and delay-locked loop circuit

There is provided a voltage controlled ring oscillator having a plurality of ring-connected amplifiers (), and a plurality of variable capacitance elements () being respectively connected to the plurality of amplifiers and having capacitances varied by a voltage control. A plurality of load resistors () and a plurality of tail current sources () are respectively connected to the plurality of amplifiers.

Phased locked loop circuit including voltage controlled ring oscillator

An oscillator for ensuring the phase relationship between two resonant circuits coupled by a coupling circuit. A first resonant circuit outputs two signals having different phases, and a second resonant circuit outputs two signals having different phases. The coupling circuit includes a plurality of inverters connected in a ring manner, and couples the first resonant circuit and the second resonant circuit such that the two signals output from the first resonant circuit and the two signals output from the second resonant circuit have different phases. A filter is connected to the input side of each of the plurality of inverters. With this structure, a signal output from each of the plurality of inverters has either a phase lead or a phase lag according to the phase characteristics of the corresponding filter, and thus the phase relationship between the first resonant circuit and the second resonant circuit is ensured.

Oscillator and semiconductor device

A bias current IB additionally provided to a current-controlled circuit in a PLL circuit is the sum of bias currents IB and IB which are generated by a bias adjustment circuit ( and ) and a bias current generating circuit ( and ), respectively. The bias adjustment circuit adjusts the bias current IB in response to an adjustment start signal ADJ such that a control voltage VC converges to a reference voltage VREF, and ceases the adjustment when the convergence has been achieved. The reference voltage VREF is determined to be a value at an almost middle point in a range of the variable VC in the PLL circuit. The bias current generating circuit has a circuit generating a bias voltage VT and a circuit converting the VT into a current IB wherein the temperature characteristic of the bias voltage VT is reverse to that of the control voltage VC under the condition that the frequency of an oscillation signal OCLK is fixed.

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Kawasaki, Japan

Hirohito Higashi