Hideo Chigasaki

This inventor holds 5 USPTO granted patents. Top assignees: Renesas Technology Corp., Other. Active years: 2002-2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Hideo Chigasaki. Retrieved from https://idiyas.com/inventor/hideo-chigasaki

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 5

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 4

Forward Citations = 144(Granted Patents)

Company Filing History:

2 out of 3,781

Renesas Technology Corp.

patents

3 out of 834,513

Other

patents

Years Active: 2002-2008

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5 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7457161 - Nonvolatile memory apparatus (2008-11-25),

2. 7170787 - Nonvolatile memory apparatus (2007-01-30),

3. 6703879 - Clock generation circuit, control method of clock generation circuit and semiconductor memory device (2004-03-09),

4. 6677791 - Clock generation circuit, control method of clock generation circuit, clock reproducing circuit, semiconductor memory device, and dynamic random access memory (2004-01-13),

5. 6437619 - Clock generation circuit, control method of clock generation circuit, clock reproducing circuit, semiconductor memory device, and dynamic random access memory (2002-08-20),

Title: Hideo Chigasaki: Innovator in Nonvolatile Memory Technology

Introduction

Hideo Chigasaki is a prominent inventor based in Kunitachi, Japan. He has made significant contributions to the field of nonvolatile memory technology, holding a total of 5 patents. His work focuses on reducing power consumption in memory devices, which is crucial for enhancing efficiency in electronic applications.

Latest Patents

Chigasaki's latest patents include innovative designs for nonvolatile memory apparatuses. One of his notable inventions addresses the issue of current consumption in nonvolatile memory devices operable on multiple power voltages. This invention aims to substantially reduce power usage in standby mode. The design features a stepped-down power supply unit that generates an internal power voltage. When supplied with approximately 3.3 V, the first stepped-down power supply circuit outputs this internal voltage to control circuits during normal operation. In low power consumption mode, a second circuit manages the internal voltage, while a third circuit, utilizing an N-channel MOS transistor, outputs a reduced internal voltage during standby mode.

Career Highlights

Throughout his career, Hideo Chigasaki has worked with notable companies, including Renesas Technology Corporation. His expertise in memory technology has positioned him as a key figure in the development of efficient electronic components. His contributions have been instrumental in advancing the capabilities of nonvolatile memory systems.

Collaborations

Chigasaki has collaborated with talented individuals in the field, including Yuichi Okuda and Hiroki Miyashita. These partnerships have fostered innovation and have led to the successful development of various technologies in the memory sector.

Conclusion

Hideo Chigasaki's work in nonvolatile memory technology exemplifies the importance of innovation in reducing power consumption in electronic devices. His patents and collaborations highlight his significant impact on the industry.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]