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For the Inventor, By the Inventor

Santa Barbara, CA, United States of America

Heather D Leifeste

This inventor holds 4 USPTO granted patents and 1 published patent application. Top assignee: Raytheon Company. Active years: 2012-2023.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Heather D Leifeste. Retrieved from https://idiyas.com/inventor/heather-d-leifeste

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 4 

% Patents Active = 100.0

Average Co-Inventor Count = 2.4

ph-index = 2

Forward Citations = 13(Granted Patents)


Location History:

  • Goleta, CA (US) (2012)
  • Santa Barbara, CA (US) (2021 - 2023)

Company Filing History:

goldMedal4 out of 8,313 
 
Raytheon Company
 patents

Years Active: 2012-2023

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4 patents (USPTO):Explore Patents
1. 11776981 - Eliminating interconnect strains in microcircuits (2023-10-03),
2. 11387126 - Paddle tool for transporting semiconductor wafers or other components (2022-07-12),
3. D911986 - Handheld semiconductor wafer handling tool (2021-03-02),
4. 8154099 - Composite semiconductor structure formed using atomic bonding and adapted to alter the rate of thermal expansion of a substrate (2012-04-10),

Title: Heather D. Leifeste: Innovator in Semiconductor Technology

Introduction

Heather D. Leifeste is a prominent inventor based in Santa Barbara, CA (US). She has made significant contributions to the field of semiconductor technology, holding a total of 4 patents. Her innovative work focuses on improving the efficiency and reliability of microcircuits and semiconductor components.

Latest Patents

One of her latest patents is titled "Eliminating interconnect strains in microcircuits." This patent describes a method for eliminating interconnect strains in a stack-up, which includes providing a detector portion with a substrate and layers, as well as a read-out integrated circuit (ROIC) stack-up. The method involves removing the initial ROIC substrate and attaching a new substrate that matches the coefficient of thermal expansion of the detector substrate. This innovation aims to enhance the performance of microcircuits by reducing strain-related issues.

Another notable patent is for a "Paddle tool for transporting semiconductor wafers or other components." This apparatus is designed to securely transport components, featuring a base for receiving components, a handle for ease of use, and a clip that can slide along the handle. The clip is designed to lock in place to prevent the accidental release of components during transport, ensuring safety and efficiency in handling delicate semiconductor materials.

Career Highlights

Heather D. Leifeste is currently employed at Raytheon Company, where she continues to develop cutting-edge technologies in the semiconductor industry. Her work has been instrumental in advancing the capabilities of microelectronics, contributing to the overall progress in this critical field.

Collaborations

Throughout her career, Heather has collaborated with notable colleagues, including Ron C. Stevens and Andreas Hampp. These partnerships have fostered a collaborative environment that encourages innovation and the sharing of ideas.

Conclusion

Heather D. Leifeste is a trailblazer in semiconductor technology, with a strong portfolio of patents that reflect her commitment to innovation. Her contributions are shaping the future of microelectronics and enhancing the performance of semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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