Harry S Barowski

This inventor holds 62 USPTO granted patents and 1 published patent application and 2 EPO patents, primarily in Integrated Circuit Design (CPC class G06F). Top assignees: International Business Machines Corporation, Globalfoundries Inc., International Buisiness Machines Corporatoin. Active years: 2005-2026.

USPTO Granted Patents = 62 (Patent Applications = 1)

% Patents Active = 37.1

EPO Patents = 2 (Patent Applications = 1)

Average Co-Inventor Count = 4.1

ph-index = 9

Forward Citations = 267(Granted Patents)

Forward Citations (Not Self Cited) = 238(Dec 10, 2025)

Inventors with similar research interests:

Location History:

Boebliingen, DE (2013)
Böblingen, DE (2013)
Beoblingen, DE (2017 - 2019)
Boeblingen, DE (2005 - 2020)
Schoenaich, DE (2019 - 2024)

Company Filing History:

59 out of 166,264

International Business Machines Corporation

International Buisiness Machines Corporatoin

patent

Years Active: 2005-2026

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Areas of Expertise:

Qubit Tuning

Superconductors

Dynamic Circuit

SRAM Optimization

Through-Silicon Vias

Power Consumption

Integrated Circuit

Digital Logic

Race Violations

Memory Testing

Heat Transfer

Out-Of-Order Instructions

62 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12645364 - Performing a read operation and a clear operation in a late select array in the same clock cycle (2026-06-02),

2. 12596947 - Qubit tuning by magnetic fields in superconductors (2026-04-07),

3. 11881853 - True complement dynamic circuit and method for combining binary data (2024-01-23),

4. 11557335 - Erasing a partition of an SRAM array with hardware support (2023-01-17),

5. 11501196 - Qubit tuning by magnetic fields in superconductors (2022-11-15),

6. 11043938 - Digital logic circuit for deterring race violations at an array test control boundary using an inverted array clock signal feature (2021-06-22),

7. 10984843 - RAM memory with pre-charging circuitry coupled to global bit-lines and method for reducing power consumption (2021-04-20),

8. 10956644 - Integrated circuit design changes using through-silicon vias (2021-03-23),

9. 10832763 - Global bit line latch performance and power optimization (2020-11-10),

10. 10593420 - Testing content addressable memory and random access memory (2020-03-17),

11. 10587248 - Digital logic circuit for deterring race violations at an array test control boundary using an inverted array clock signal feature (2020-03-10),

12. 10534884 - Layout of large block synthesis blocks in integrated circuits (2020-01-14),

13. 10417366 - Layout of large block synthesis blocks in integrated circuits (2019-09-17),

14. 10367481 - Digital logic circuit for deterring race violations at an array test control boundary using an inverted array clock signal feature (2019-07-30),

15. 10366191 - Layout of large block synthesis blocks in integrated circuits (2019-07-30),

Title: Inventor Harry S Barowski - Pioneering Innovations in Boeblingen

Introduction: Harry S Barowski is a distinguished inventor based in Boeblingen, Germany, known for his groundbreaking contributions to various technological fields.

Latest Patents: Harry S Barowski holds several patents in the areas of renewable energy, artificial intelligence, and sustainable transportation, showcasing his versatility and forward-thinking approach.

Career Highlights: With a career spanning over two decades, Harry S Barowski has worked with leading research institutions and multinational companies to develop cutting-edge solutions that have revolutionized industries.

Collaborations: Throughout his career, Harry S Barowski has collaborated with top engineers, scientists, and designers, fostering a culture of innovation and excellence in all his projects.

Conclusion: Harry S Barowski's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors and shape the future of technology.