Singapore, Singapore

Han Wang

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: United Microelectronics Corp.. Active years: 2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Han Wang. Retrieved from https://idiyas.com/inventor/han-wang-641zzt6p

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1


Company Filing History:


Years Active: 2018

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1 patent (USPTO):Explore Patents

Title: Han Wang - Innovator in Semiconductor Technology

Introduction

Han Wang is a notable inventor based in Singapore, SG. He has made significant contributions to the field of semiconductor technology. With a focus on memory cell structures, his work has implications for the advancement of electronic devices.

Latest Patents

Han Wang holds a patent for a semiconductor memory cell structure. This innovative design includes a substrate, a tunnel dielectric layer, a blocking dielectric layer, a control gate, and a tri-layered charge-trapping layer. The tri-layered charge-trapping layer consists of a bottom nitride layer, a top nitride layer, and a middle nitride layer. Notably, the middle nitride layer has a higher concentration of nitride compared to the other two layers, enhancing the performance of the memory cell.

Career Highlights

Han Wang is currently employed at United Microelectronics Corporation, where he continues to develop cutting-edge semiconductor technologies. His expertise in memory cell structures has positioned him as a valuable asset in the industry.

Collaborations

Han Wang collaborates with Xian Feng Du, furthering research and development in semiconductor technologies.

Conclusion

Han Wang's contributions to semiconductor memory cell structures demonstrate his innovative spirit and commitment to advancing technology. His work is essential for the future of electronic devices and memory storage solutions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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