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For the Inventor, By the Inventor

Portland, OR, United States of America

Gurbir Singh

This inventor holds 29 USPTO granted patents, primarily in Bus Architecture. Top assignees: Intel Corporation, Other. Active years: 1989-2005.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Gurbir Singh. Retrieved from https://idiyas.com/inventor/gurbir-singh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 29

% Patents Active = 86.2

Average Co-Inventor Count = 4.0

ph-index = 17

Forward Citations = 792(Granted Patents)


Location History:

  • Portland, OR (US) (1989 - 2002)
  • Gig Harbor, WA (US) (2003 - 2005)

Company Filing History:

goldMedal28 out of 56,322 
 
Intel Corporation
 patents
silverMedal1 out of 834,513 
Other
 patents

Years Active: 1989-2005

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Areas of Expertise:
Bus Architecture
Pipelined Design
Cache Coherency
Data Flow Control
Processor Clock Settings
Quad Pumped Protocol
Multi-Processor Caching
Synchronous Data Transmission
Distributed Bus Arbitration
Microprocessor Access
Memory Subsystem
I/O Sequencer
29 patents (USPTO):Explore Patents
1. 6907487 - Enhanced highly pipelined bus architecture (2005-06-14),
2. 6880031 - Snoop phase in a highly pipelined bus architecture (2005-04-12),
3. 6807592 - Quad pumped bus architecture and protocol (2004-10-19),
4. 6804735 - Response and data phases in a highly pipelined bus architecture (2004-10-12),
5. 6609171 - Quad pumped bus architecture and protocol (2003-08-19),
6. 6601121 - Quad pumped bus architecture and protocol (2003-07-29),
7. 6405271 - Data flow control mechanism for a bus supporting two-and three-agent transactions (2002-06-11),
8. 6311281 - Apparatus and method for changing processor clock ratio settings (2001-10-30),
9. 6202125 - Processor-cache protocol using simple commands to implement a range of cache configurations (2001-03-13),
10. 6118306 - Changing clock frequency (2000-09-12),
11. 6006299 - Apparatus and method for caching lock conditions in a multi-processor (1999-12-21),
12. 5966722 - Method and apparatus for controlling multiple dice with a single die (1999-10-12),
13. 5937171 - Method and apparatus for performing deferred transactions (1999-08-10),
14. 5923857 - Method and apparatus for ordering writeback data transfers on a bus (1999-07-13),
15. 5911053 - Method and apparatus for changing data transfer widths in a computer (1999-06-08),

Title: Innovations by Gurbir Singh: A Pioneer in Bus Architecture

Introduction

Gurbir Singh, based in Portland, OR, is a prolific inventor with an impressive portfolio of 29 patents. His work primarily focuses on advancements in bus architecture, showcasing his dedication to enhancing technology in the computing field.

Latest Patents

Among his most recent innovations are two notable patents in the realm of highly pipelined bus architectures. The first, "Enhanced Highly Pipelined Bus Architecture," describes a bus agent that operates efficiently at varying clock frequencies to optimize control signals, address elements, and data elements. This architecture allows for a more efficient data transfer rate by synchronizing the strobe transitions for addresses and data.

The second patent, "Snoop Phase in a Highly Pipelined Bus Architecture," outlines a sophisticated bus agent that employs a series of snoop status interfaces and bus controller logic. This innovation enables more efficient transaction sensing, ensuring that the bus cycle operates effectively by coordinating with the bus clock signal. Both innovations exemplify Singh's ability to enhance performance in computing technologies.

Career Highlights

Gurbir Singh has made significant contributions through his roles in esteemed companies, notably at Intel Corporation, where he applied his expertise in bus architectures to develop cutting-edge technologies that have pushed the boundaries of performance and efficiency in computing systems.

Collaborations

Throughout his career, Singh has worked alongside talented individuals such as Nitin V Sarangdhar and Konrad K Lai. These collaborations have undoubtedly enriched his work and fostered innovative advances in the technologies he has developed.

Conclusion

Gurbir Singh's impressive array of patents and collaborative efforts underscore his status as a leading innovator in the field of bus architecture. His advancements not only reflect his personal dedication but also contribute significantly to the ongoing evolution of computing technology. With a keen focus on enhancing performance and efficiency, Singh remains a pivotal figure in technological innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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