The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2001
Filed:
Mar. 02, 1999
Applicant:
Inventors:
Edwin J. Pole, II, Hillsboro, OR (US);
John T. Orton, Los Altos, CA (US);
Cau L. Nguyen, Fremont, CA (US);
Gurbir Singh, Portland, OR (US);
Xia Dai, Fremont, CA (US);
Ravi Nagaraj, Lakeville, MN (US);
Assignee:
Other;
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/04 ;
U.S. Cl.
CPC ...
G06F 1/04 ;
Abstract
A processor has an external pin that can be asserted to lock in new clock ratio information dynamically. A state machine of the processor defines a stop grant state that is utilized to halt the internal clocking signal of the processor. A storage location, such as a register, is utilized to load new clock frequency information into the clock generator circuit of the processor. De-asserting the external pin of the processor causes the processor to resume normal operations, but at the newly set clock frequency.