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For the Inventor, By the Inventor

Austin, TX, United States of America

Gopi Ganapathy

This inventor holds 8 USPTO granted patents. Top assignee: Advanced Micro Devices Corporation. Active years: 1995-1998.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Gopi Ganapathy. Retrieved from https://idiyas.com/inventor/gopi-ganapathy

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 8

% Patents Active = 100.0

Average Co-Inventor Count = 1.7

ph-index = 6

Forward Citations = 94(Granted Patents)


Company Filing History:

goldMedal8 out of 13,168 
 
Advanced Micro Devices Corporation
 patents

Years Active: 1995-1998

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8 patents (USPTO):Explore Patents
1. 5721695 - Simulation by emulating level sensitive latches with edge trigger latches (1998-02-24),
2. 5630100 - Simulating multi-phase clock designs using a single clock edge based (1997-05-13),
3. 5561792 - Microprocessor with software switchable clock speed and drive strength (1996-10-01),
4. 5502414 - Circuit for delaying data latching from a precharged bus and method (1996-03-26),
5. 5450418 - Pseudo master slave capture mechanism for scan elements (1995-09-12),
6. 5444407 - Microprocessor with distributed clock generators (1995-08-22),
7. 5426650 - Full scan optimization technique using drive one/drive zero elements and (1995-06-20),
8. 5412663 - Apparatus for synchronizing asynchronous circuits for testing operations (1995-05-02),

Title: Gopi Ganapathy: Innovator in Hardware Simulation Technologies

Introduction

Gopi Ganapathy is a prominent inventor based in Austin, TX (US), known for her significant contributions to hardware simulation technologies. With a total of 8 patents, she has made remarkable advancements in the field, particularly in the emulation of latches and clock designs.

Latest Patents

Gopi's latest patents include innovative methods for hardware simulation. One of her notable inventions is a system that emulates level sensitive latches using edge triggered latches. This hardware simulation system utilizes a high frequency clock gated with a system clock to produce a high frequency enabled clock, which effectively clocks an edge triggered latch. This approach provides a significant advantage in simulating level sensitive latches. Another of her recent patents involves a method for converting multiple-phase circuits into single-clock-edge circuits. This method includes receiving a data signal and a system clock signal, allowing for efficient data transfer and latching based on the phase clock signal's activity.

Career Highlights

Gopi Ganapathy works at Advanced Micro Devices Corporation, where she has been instrumental in developing cutting-edge technologies. Her work has not only advanced the field of hardware simulation but has also contributed to the overall progress of the company in the tech industry.

Collaborations

Throughout her career, Gopi has collaborated with notable colleagues, including Robert C. Thaden and Stephen C. Horne. These collaborations have fostered an environment of innovation and creativity, leading to the development of groundbreaking technologies.

Conclusion

Gopi Ganapathy's contributions to hardware simulation technologies exemplify her dedication and expertise in the field. Her innovative patents and collaborative efforts continue to influence advancements in technology, making her a key figure in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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