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For the Inventor, By the Inventor

Concord, MA, United States of America

Gerald L Frenkil

This inventor holds 11 USPTO granted patents and 2 published patent applications. Top assignees: Sequence Design, Inc., Vlsi Technology, Inc., Apache Design Solutions, Inc.. Active years: 1993-2011.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Gerald L Frenkil. Retrieved from https://idiyas.com/inventor/gerald-l-frenkil

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 11 

% Patents Active = 100.0

Average Co-Inventor Count = 1.3

ph-index = 8

Forward Citations = 251(Granted Patents)


Location History:

  • Brookline, MA (US) (1993)
  • Concord, MA (US) (1995 - 2011)

Company Filing History:

goldMedal5 out of 28 
 
Sequence Design, Inc.
 patents
silverMedal3 out of 1,083 
 
Vlsi Technology, Inc.
 patents
bronzeMedal2 out of 5 
 
Apache Design Solutions, Inc.
 patents
4. 1 out of 1 
 
Sente, Inc.
 patent

Years Active: 1993-2011

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11 patents (USPTO):Explore Patents
1. 7987441 - Method and architecture for power gate switch placement (2011-07-26),
2. 7774728 - Method that allows flexible evaluation of power-gated circuits (2010-08-10),
3. 7590962 - Design method and architecture for power gate switch placement (2009-09-15),
4. 7509613 - Design method and architecture for power gate switch placement and interconnection using tapless libraries (2009-03-24),
5. 7185300 - Vectorless instantaneous current estimation (2007-02-27),
6. 7117457 - Current scheduling system and method for optimizing multi-threshold CMOS designs (2006-10-03),
7. 6807660 - Vectorless instantaneous current estimation (2004-10-19),
8. 6151568 - Power estimation software system (2000-11-21),
9. 5418407 - Asynchronous to synchronous particularly CMOS synchronizers (1995-05-23),
10. 5193072 - Hidden refresh of a dynamic random access memory (1993-03-09),
11. 5181203 - Testable power-on-reset circuit (1993-01-19),

Title: Gerald L. Frenkil: Innovator in Power Circuit Design

Introduction

Gerald L. Frenkil is a notable inventor based in Concord, MA, with a significant contribution to the field of power circuit design. He holds a total of 11 patents, showcasing his innovative approach to enhancing the efficiency of logic circuits.

Latest Patents

Among his latest patents is a method and architecture for power gate switch placement. This design method strategically places power gates or switch cells in unoccupied locations of logic cell rows. By utilizing unoccupied spaces, the method maintains the silicon real estate requirement while optimizing the placement density of power gate cells. Another significant patent involves a method that allows flexible evaluation of power-gated circuits. This method introduces a design automation tool that distinguishes virtual power signals from both logic and power signals, enhancing the design process for logic circuits.

Career Highlights

Gerald has worked with prominent companies such as Sequence Design, Inc. and VLSI Technology, Inc. His experience in these organizations has contributed to his expertise in circuit design and innovation.

Collaborations

Throughout his career, Gerald has collaborated with notable professionals, including Srinivasan Venkatraman and Steven E. Golson. These collaborations have further enriched his work and contributions to the field.

Conclusion

Gerald L. Frenkil's innovative patents and career achievements highlight his significant impact on power circuit design. His work continues to influence advancements in the industry, showcasing the importance of innovation in technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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