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Years Active: 2017-2019
Title: The Innovative Contributions of Elise Baylac
Introduction
Elise Baylac is a prominent inventor based in Les Adrets, France. She has made significant contributions to the field of semiconductor technology, holding two patents that showcase her innovative approach to forming strained and stressed semiconductor layers. Her work has implications for the development of advanced transistors, which are crucial for modern electronic devices.
Latest Patents
Elise Baylac's latest patents include a method of forming strained MOS transistors and a method of forming a stressed semiconductor layer. The first patent describes a process where a strained semiconductor layer is produced from a semiconductor layer extending on an insulating layer. This involves performing thermal oxidation across the entire thickness of the semiconductor layer to create two bars that extend in the direction of the transistor width. Insulating trenches are formed to manage the strain within the semiconductor layer, ensuring optimal performance of the transistor. The second patent focuses on creating a semiconductor layer with uniaxial stress, detailing the formation of isolation trenches that define the dimensions of transistors within a semiconductor structure.
Career Highlights
Throughout her career, Elise Baylac has worked with notable companies, including STMicroelectronics, where she contributed to various projects related to semiconductor technology. Her experience at STMicroelectronics has allowed her to refine her skills and develop innovative solutions that address the challenges in the semiconductor industry.
Collaborations
Elise has collaborated with esteemed colleagues such as Pierre Morin and Remy Berthelon. These partnerships have fostered a creative environment that encourages the exchange of ideas and advancements in technology.
Conclusion
Elise Baylac's contributions to semiconductor technology through her patents and collaborations highlight her role as an influential inventor in the field. Her innovative methods for forming strained and stressed semiconductor layers are paving the way for advancements in transistor technology.