The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 16, 2019
Filed:
Dec. 22, 2016
Stmicroelectronics (Crolles 2) Sas, Crolles, FR;
Stmicroelectronics SA, Montrouge, FR;
Commissariat a L'energie Atomique ET Aux Energies Alternatives, Paris, FR;
Remy Berthelon, Saint Martin Heres, FR;
Didier Dutartre, Meylan, FR;
Pierre Morin, Albany, NY (US);
Francois Andrieu, Saint-Ismier, FR;
Elise Baylac, Les Adrets, FR;
STMicroelectronics (Crolles 2) SAS, Crolles, FR;
STMicroelectronics SA, Montrouge, FR;
Commissariat A L'Energie Atomique et aux Energies Alternatives, Paris, FR;
Abstract
A strained semiconductor layer is produced from a semiconductor layer extending on an insulating layer. A thermal oxidization is performed on the semiconductor layer across its entire thickness to form two bars extending in a direction of a transistor width. Insulating trenches are formed in a direction of a transistor length. A strain of the strained semiconductor layer is induced in one implementation before the thermal oxidation is performed. Alternatively, the strain is induced after the thermal oxidation is performed. The insulating trenches serve to release a component of the strain extending in the direction of transistor width. A component of the strain extending in the direction of transistor length is maintained. The bars and trenches delimit an active area of the transistor include source, drain and channel regions.