The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2017

Filed:

Oct. 28, 2014
Applicants:

Stmicroelectronics SA, Montrouge, FR;

Stmicroelectronics (Crolles 2) Sas, Crolles, FR;

Stmicroelectronics, Inc., Coppell, TX (US);

Inventors:

Denis Rideau, Grenoble, FR;

Elise Baylac, Les Adrets, FR;

Emmanuel Josse, La Motte Servolex, FR;

Pierre Morin, Albany, NY (US);

Olivier Nier, Varces, FR;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 21/84 (2006.01); H01L 21/762 (2006.01); H01L 29/78 (2006.01); H01L 21/02 (2006.01); H01L 21/265 (2006.01); H01L 21/3115 (2006.01); H01L 21/308 (2006.01); H01L 21/3105 (2006.01); H01L 21/324 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823481 (2013.01); H01L 21/02356 (2013.01); H01L 21/02532 (2013.01); H01L 21/265 (2013.01); H01L 21/3081 (2013.01); H01L 21/3105 (2013.01); H01L 21/31155 (2013.01); H01L 21/76224 (2013.01); H01L 21/76237 (2013.01); H01L 21/823431 (2013.01); H01L 21/845 (2013.01); H01L 29/7831 (2013.01); H01L 29/7846 (2013.01); H01L 29/7847 (2013.01); H01L 21/26506 (2013.01); H01L 21/324 (2013.01); H01L 27/1203 (2013.01);
Abstract

The invention concerns a method of forming a semiconductor layer having uniaxial stress including: forming, in a semiconductor structure having a stressed semiconductor layer, one or more first isolation trenches in a first direction for delimiting a first dimension of at least one transistor to be formed in said semiconductor structure; forming, in the semiconductor structure, one or more second isolation trenches in a second direction for delimiting a second dimension of the at least one transistor, the first and second isolation trenches being at least partially filled with an insulating material; and before or after the formation of the second isolation trenches, decreasing the viscosity of the insulating material in the first isolation trenches by implanting atoms of a first material into the first isolation trenches, wherein atoms of the first material are not implanted into the second isolation trenches.


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