Sunnyvale, CA, United States of America

Dinesh Gupta


Average Co-Inventor Count = 2.7

ph-index = 5

Forward Citations = 101(Granted Patents)


Location History:

  • San Jose, CA (US) (2013)
  • Sunnyvale, CA (US) (2011 - 2015)

Company Filing History:


Years Active: 2011-2015

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8 patents (USPTO):

Title: Innovations by Dinesh Gupta in Integrated Circuit Design

Introduction

Dinesh Gupta is a prominent inventor based in Sunnyvale, CA, known for his significant contributions to the field of integrated circuit design. With a total of 8 patents to his name, Gupta has made remarkable advancements that enhance the efficiency and effectiveness of circuit design processes.

Latest Patents

Among his latest patents, Gupta has developed methods for machine-readable products that facilitate single-pass parallel hierarchical timing closure of integrated circuit designs. This invention involves partitioning an integrated circuit design into a hierarchy, allowing for the generation of timing budget models that ensure independent implementation of the top level. Another notable patent focuses on multi-phase models for timing closure, which includes analyzing partition blocks for timing exceptions and generating internal timing pins to manage these exceptions effectively.

Career Highlights

Dinesh Gupta is currently employed at Cadence Design Systems, Inc., where he continues to innovate and contribute to the advancement of integrated circuit technologies. His work has been instrumental in improving design methodologies and ensuring that timing constraints are met in complex circuit designs.

Collaborations

Throughout his career, Gupta has collaborated with notable colleagues such as Oleg Levitsky and Vivek Bhardwaj, further enhancing the impact of his inventions in the industry.

Conclusion

Dinesh Gupta's contributions to integrated circuit design through his innovative patents have significantly advanced the field. His work continues to influence the development of efficient design methodologies in the industry.

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