Amsterdam, Netherlands

Diego Millo

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Asml Netherlands B.v.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Diego Millo. Retrieved from https://idiyas.com/inventor/diego-millo

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1


Company Filing History:


Years Active: 2026

Loading Chart...
1 patent (USPTO):Explore Patents

Title: Diego Millo and Lithography Innovation

Introduction

Diego Millo is an inventor based in Amsterdam, the Netherlands, associated with ASML Netherlands B.V. His patent work concerns lithography technology and the stability and corrosion resistance of substrate holders used in semiconductor manufacturing.

Latest Patents

Millo is named on one patent, 1 patent: “Lithography apparatus with improved stability.” The invention describes methods and systems for improving the corrosion resistance of lithography substrate holders. It also covers substrates designed so their backsides preferentially corrode during lithography use, and methods for fabricating devices such as integrated circuits with the systems.

Career Highlights

Millo’s patent reflects work in an area central to lithographic apparatus: improving the durability and performance of components that support substrates during device fabrication. The disclosed approaches address corrosion through holder design, substrate configuration, and manufacturing methods.

Collaborations

Millo’s listed coworkers include Aleksandar Nikolov Zdravkov and Paulus Albertus Van Hal. The patent information provided identifies the invention and assignee but does not specify the coworkers’ roles in its development.

Conclusion

Diego Millo’s recorded patent focuses on improving substrate-holder corrosion resistance and stability in lithography, supporting the fabrication of integrated circuits and other devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…