Campbell, CA, United States of America

Dhananjay Srinivasa Raghavan

This inventor holds 2 USPTO granted patents. Top assignee: Altera Corporation. Active years: 2007-2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Dhananjay Srinivasa Raghavan. Retrieved from https://idiyas.com/inventor/dhananjay-srinivasa-raghavan

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 2.4

ph-index = 2

Forward Citations = 16(Granted Patents)


Location History:

  • Mountain View, CA (US) (2007)
  • Campbell, CA (US) (2013)

Company Filing History:


Years Active: 2007-2013

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2 patents (USPTO):Explore Patents

Title: Dhananjay Srinivasa Raghavan: Innovator in Integrated Circuit Testing

Introduction

Dhananjay Srinivasa Raghavan is a notable inventor based in Campbell, CA (US). He has made significant contributions to the field of integrated circuit testing, holding 2 patents that showcase his innovative approach to technology.

Latest Patents

Raghavan's latest patents include advancements in programmable delay test circuitry and feature control circuitry for testing integrated circuits. The programmable delay test circuitry is designed to test a circuit under test on an integrated circuit. It utilizes logic circuitry to output an error signal when the delay time provided by the circuit under test exceeds a characteristic time that can be programmed into the circuitry. This innovative design includes a logic gate that generates a pulse with a width equal to the delay of the delay circuitry. Additionally, the programmable delay test circuitry features a programmable load that can be set to a specific characteristic time, asserting an error signal when the delay time surpasses this threshold.

The feature control circuitry for testing integrated circuits includes testing circuitry for input-output circuits. This integrated circuit comprises input-output circuits with associated input-output pins and buffers. Each input-output circuit is equipped with features such as weak pull-up, voltage clamp diode, bus hold, open-drain, differential input termination resistance, and single-ended/differential mode selection. A feature control register receives instructions for feature selection, allowing for systematic testing of the input-output circuit features.

Career Highlights

Dhananjay Srinivasa Raghavan is currently employed at Altera Corporation, where he continues to innovate in the field of integrated circuits. His work has significantly impacted the efficiency and reliability of testing methodologies in this domain.

Collaborations

Raghavan has collaborated with notable colleagues such as Paul J. Tracy and Jaydev Amit Shelat, contributing to advancements in integrated circuit technology.

Conclusion

Dhananjay Srinivasa Raghavan is a distinguished inventor whose work in integrated circuit testing has led to significant technological advancements. His contributions continue to influence the field and enhance the capabilities of integrated circuits.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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