Fremont, CA, United States of America

Dennis Cheng

This inventor holds 1 USPTO granted patent. Top assignee: Winbond Electronics Corporation. Active years: 2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Dennis Cheng. Retrieved from https://idiyas.com/inventor/dennis-cheng

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2016

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1 patent (USPTO):Explore Patents

Title: The Innovative Mind of Dennis Cheng: Revolutionizing Semiconductor Technology

Introduction: Dennis Cheng, an accomplished inventor based in Fremont, CA, has made significant strides in the field of semiconductor technology with his groundbreaking patent.

Latest Patents: Dennis Cheng holds a remarkable patent for "Semiconductor wafers and testing methods thereof." This invention introduces a novel approach to semiconductor wafer design, incorporating a die area, a scribe area, a die with a main circuit, and a testing circuit for efficient testing of the main circuit.

Career Highlights: Currently affiliated with Winbond Electronics Corporation, Dennis Cheng continues to push the boundaries of innovation in the semiconductor industry. His dedication and ingenuity have led to the development of cutting-edge technologies that redefine the landscape of semiconductor manufacturing.

Collaborations: Throughout his illustrious career, Dennis Cheng has collaborated with esteemed colleagues such as Hsi-Hsien Hung and Johnny Chan. Together, they have fostered a culture of innovation and excellence within the semiconductor industry, driving forward progress and pioneering new solutions.

Conclusion: Dennis Cheng's unwavering commitment to innovation and his profound impact on semiconductor technology underscore his position as a trailblazer in the field. With a keen focus on advancing the boundaries of what is possible, Cheng's contributions continue to shape the future of semiconductor technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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