Hillsboro, OR, United States of America

Deepak Sridhar

This inventor holds 1 USPTO granted patent. Top assignee: Intel Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Deepak Sridhar. Retrieved from https://idiyas.com/inventor/deepak-sridhar-3hliz9dm

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Deepak Sridhar - Innovator in Integrated Circuit Technology

Introduction

Deepak Sridhar is an inventor based in Hillsboro, OR (US). He has made significant contributions to the field of integrated circuits, particularly in the design of gate-all-around (GAA) structures. His innovative approach focuses on enhancing the performance and efficiency of semiconductor devices.

Latest Patent Applications

Deepak Sridhar has filed a patent application titled "SOURCE AND DRAIN REGIONS FOR LATERALLY ADJACENT GATE-ALL-AROUND (GAA) PMOS AND NMOS." This application describes an integrated circuit that includes laterally adjacent first and second devices. The first device features a first source or drain region, a first gate structure, and a first inner spacer positioned between the first source or drain region and the first gate structure. Similarly, the second device comprises a second source or drain region, a second gate structure, and a second inner spacer between the second source or drain region and the second gate structure. Notably, the first source or drain region has a width that differs by at least 1 nanometer from the width of the second source or drain region. Additionally, the first inner spacer has a width that is at least 1 nanometer different from the width of the second inner spacer. These measurements are taken in the direction of a semiconductor body between the first source or drain region and the first gate structure.

Conclusion

Deepak Sridhar is an emerging inventor in the field of integrated circuits, with a focus on innovative designs that improve semiconductor technology. His work on GAA structures showcases his commitment to advancing the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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