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Fremont, CA, United States of America

Deepak Soi

This inventor holds 2 USPTO granted patents. Top assignee: Cadence Design Systems, Inc.. Active years: 2011-2020.

USPTO Granted Patents = 2

% Patents Active = 100.0

Average Co-Inventor Count = 3.4

ph-index = 1

Forward Citations = 11(Granted Patents)

Location History:

Noida, IN (2011)
Fremont, CA (US) (2020)

Company Filing History:

Cadence Design Systems, Inc.

Years Active: 2011-2020

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2 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 10853545 - Automatic gate-level FS analysis and FMEDA (2020-12-01),

2. 8032876 - Method and apparatus for restructuring a software program hierarchy (2011-10-04),

Profile summary based on public USPTO records.

Please report any incorrect information to [email protected]

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