Ghaziabad, India

Deepak Karnatak

This inventor holds 1 USPTO granted patent. Top assignee: Cadence Design Systems, Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Deepak Karnatak. Retrieved from https://idiyas.com/inventor/deepak-karnatak

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Deepak Karnatak: Innovator in Electronic Design Automation

Introduction

Deepak Karnatak is a notable inventor based in Ghaziabad, India. He has made significant contributions to the field of electronic design automation (EDA). His innovative work focuses on improving circuit design processes, particularly in the area of etching shape insertion.

Latest Patents

Deepak holds a patent for "Etching shape insertion based on spacing rule." This patent addresses the challenges of inserting etching shapes in circuit designs while adhering to various spacing rules. The invention allows for the insertion of etching shapes during block implementations, which helps to resolve wire-end spacing violations for abutted cell placements. Additionally, it supports variable trim height to prevent new violations from being introduced.

Career Highlights

Deepak Karnatak is currently employed at Cadence Design Systems, Inc., where he continues to develop innovative solutions in EDA. His work has been instrumental in enhancing the efficiency and accuracy of circuit design processes.

Collaborations

Deepak collaborates with talented professionals such as Sachin Shrivastava and Vishal Rastogi. Their combined expertise contributes to the advancement of technology in the field.

Conclusion

Deepak Karnatak's contributions to electronic design automation through his patent and work at Cadence Design Systems, Inc. highlight his role as an influential inventor in the industry. His innovative solutions continue to shape the future of circuit design.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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