This inventor holds 2 USPTO granted patents and 1 published patent application. Top assignee: Intel Corporation. Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: David M. Fryauf and Semiconductor Device Protection
Introduction
David M. Fryauf is an inventor associated with Intel Corporation and based in Rio Rancho, New Mexico. His patent work concerns semiconductor manufacturing, including methods for protecting phase-change materials during device fabrication.
Latest Patents
The supplied information identifies one patent for Fryauf: “Technologies for Semiconductor Devices Including Amorphous Silicon.” The patent describes etching trenches through multiple memory layers, including a phase-change layer, and then applying amorphous silicon using low-temperature chemical vapor deposition. Because this process can be performed without exceeding the phase-change layer’s melting point, it helps protect that layer during subsequent manufacturing steps. The amorphous silicon can also be oxidized to form a protective silicon oxide layer around the phase-change material. Fryauf is credited with 1 patent.
Career Highlights
Fryauf’s listed invention addresses a specific challenge in semiconductor fabrication: preserving sensitive phase-change materials while processing other layers of a memory device. The disclosed low-temperature deposition and oxidation techniques provide protective layers suited to that manufacturing context. The supplied information associates him with Intel Corporation.
Collaborations
The supplied information lists Errol Todd Ryan as Fryauf’s coworker. Their shared association with Intel Corporation provides context for Fryauf’s professional environment, though no specific joint work beyond the patent information provided is identified.
Conclusion
David M. Fryauf’s patent describes techniques for protecting phase-change layers in semiconductor devices through low-temperature amorphous-silicon deposition and the formation of silicon oxide.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
