Portland, OR, United States of America

David J Giramma

This inventor holds 3 USPTO granted patents. Top assignee: Synopsys, Inc.. Active years: 1998.

IDiyas Innovation Intelligence. (2026). Inventor Profile: David J Giramma. Retrieved from https://idiyas.com/inventor/david-j-giramma

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 3

Forward Citations = 35(Granted Patents)


Company Filing History:


Years Active: 1998

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3 patents (USPTO):Explore Patents

Title: Innovations of David J Giramma

Introduction

David J Giramma is a notable inventor based in Portland, OR (US). He has made significant contributions to the field of digital logic simulation, holding a total of 3 patents. His work focuses on enhancing the efficiency and accuracy of digital circuit simulations.

Latest Patents

One of his latest patents is titled "Digital simulator circuit modifier, network, and method." This invention describes a circuit modifier and method for use with an event-driven digital logic simulator. It ensures consistent evaluation of input pin changes at state elements by automatically interposing a fictitious 0-delay defer agent at the input pin to state elements such as D Flip-Flops. The defer agent schedules events related to input state changes, allowing for a more accurate simulation process.

Another significant patent is the "Tool, system and method for dynamic timing analysis in a plural-instance." This invention provides an efficient selection of timing statements for a logic cell in response to cell pin activity. It utilizes a first storage structure coupled with a logic processor to define plural bitfield arrays corresponding to a cell pin and its possible logic levels. This ensures that appropriate timing and constraints for the logic cell are maintained during digital logic simulation.

Career Highlights

David J Giramma is currently employed at Synopsys, Inc., where he continues to innovate in the field of digital logic simulation. His work has contributed to advancements in the efficiency of timing analysis and simulation accuracy.

Collaborations

He has collaborated with notable coworkers such as Oliver W Kozber and Thomas E Roth, further enhancing the innovative environment at Synopsys, Inc.

Conclusion

David J Giramma's contributions to digital logic simulation through his patents and work at Synopsys, Inc. highlight his role as a significant inventor in the field. His innovations continue to impact the efficiency and accuracy of digital circuit simulations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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