Tempa, AZ, United States of America

David E Lopez

This inventor holds 3 USPTO granted patents and 1 published patent application. Top assignee: Motorola Corporation. Active years: 1985-1993.

IDiyas Innovation Intelligence. (2026). Inventor Profile: David E Lopez. Retrieved from https://idiyas.com/inventor/david-e-lopez

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 3 

% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 3

Forward Citations = 29(Granted Patents)


Location History:

  • Tempa, AZ (US) (1990)
  • Tempe, AZ (US) (1985 - 1993)

Company Filing History:


Years Active: 1985-1993

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3 patents (USPTO):Explore Patents

Title: David E Lopez: Innovator in Logic Circuit Design

Introduction

David E Lopez is a notable inventor based in Tempa, AZ (US). He has made significant contributions to the field of logic circuit design, holding a total of 3 patents. His work primarily focuses on enhancing the reliability and functionality of application-specific integrated circuits (ASICs).

Latest Patents

One of his latest patents is titled "Logic circuit for reliability and yield enhancement." This invention involves a logic circuit designed for testing the reliability of an ASIC. It includes an array circuit with multiple matrix arrays that respond to various input signals, providing respective row and column outputs. A parity circuit is integrated to ensure that the output signal reflects the logical differences in the row and column outputs. This design allows for comprehensive testing of the ASIC's reliability by observing the frequency of the output signal, which indicates the number of defects within the circuit.

Another significant patent by Lopez is the "Built-in self-test method for application specific integrated circuit." This invention provides a design and method for exhaustively verifying the boolean functionality of both combinational and sequential cells within ASIC gate arrays and standard cell libraries. It utilizes a Gray code generator to stimulate each state of the cells, ensuring thorough testing and verification of functionality.

Career Highlights

David E Lopez is currently employed at Motorola Corporation, where he continues to innovate in the field of integrated circuit design. His work has been instrumental in advancing the technology used in modern electronics.

Collaborations

Lopez has collaborated with several talented individuals, including Tomas Colunga and Jerry E Prioste. Their combined expertise has contributed to the successful development of innovative solutions in the field.

Conclusion

David E Lopez is a prominent inventor whose work in logic circuit design has significantly impacted the reliability of application-specific integrated circuits. His patents reflect a commitment to innovation and excellence in technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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