Beaverton, OR, United States of America

Clint Vander Giessen

This inventor holds 1 USPTO granted patent and 1 EPO patent. Top assignee: Formfactor Beaverton, Inc.. Active years: 2018.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Clint Vander Giessen. Retrieved from https://idiyas.com/inventor/clint-vander-giessen

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

 

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 4(Granted Patents)


Company Filing History:


Years Active: 2018

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1 patent (USPTO):Explore Patents

Title: Clint Vander Giessen: Innovator in Wafer-Level Testing Technologies

Introduction

Clint Vander Giessen is a notable inventor based in Beaverton, OR (US). He has made significant contributions to the field of wafer-level testing technologies. His innovative work has led to the development of a patent that addresses critical challenges in the industry.

Latest Patents

Clint Vander Giessen holds a patent for "Probe systems, storage media, and methods for wafer-level testing over extended temperature ranges." This patent discloses methods designed to test a plurality of devices under test (DUTs) present on a substrate. The probe systems are programmed to perform these methods, while the storage media includes computer-readable instructions that guide the probe system in executing the tests.

Career Highlights

Throughout his career, Clint has worked with prominent companies in the industry, including FormFactor Beaverton, Inc. and FormFactor, Inc. His experience in these organizations has allowed him to refine his skills and contribute to advancements in testing technologies.

Collaborations

Clint has collaborated with several professionals in his field, including Timothy Allen McMullen and Jeffery Allan Shepler. These collaborations have further enhanced his work and innovation in wafer-level testing.

Conclusion

Clint Vander Giessen is a distinguished inventor whose contributions to wafer-level testing technologies have made a significant impact in the industry. His patent and career achievements reflect his dedication to innovation and excellence.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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