Hsinchu, Taiwan

Chung-Kuang Lin

This inventor holds 1 USPTO granted patent. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chung-Kuang Lin. Retrieved from https://idiyas.com/inventor/chung-kuang-lin-3kl3p3nz

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Innovations of Chung-Kuang Lin

Introduction

Chung-Kuang Lin is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor technology. His work focuses on innovative package structures and methods for fabrication.

Latest Patents

Chung-Kuang Lin holds a patent for a "Package structure and method for fabricating the same." This patent describes a package structure that includes at least one semiconductor die and a redistribution layer. The connectors are strategically placed between the semiconductor die and the redistribution layer, ensuring electrical connectivity. The redistribution layer features a dielectric layer with an opening and a metallic pattern layer, which includes a metallic via surrounded by a dielectric spacer.

Career Highlights

Chung-Kuang Lin is associated with Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His work has contributed to advancements in semiconductor packaging technology.

Collaborations

Chung-Kuang Lin has collaborated with Hsiang-Wei Liu, enhancing the innovation process through teamwork and shared expertise.

Conclusion

Chung-Kuang Lin's contributions to semiconductor technology through his innovative patent demonstrate his commitment to advancing the field. His work continues to influence the industry positively.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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